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参数资料
| 型号： | PC34703PNB/R2 |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 稳压器 |
| 英文描述： | 18 A SWITCHING REGULATOR, 400 kHz SWITCHING FREQ-MAX, PQCC33 |
| 封装： | 10 X 10 MM, 2.1 MM HEIGHT, 0.8 PITCH, PLASTIC, QFN-33 |
| 文件页数： | 18/46页 |
| 文件大小： | 2509K |
| 代理商： | PC34703PNB/R2 |
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Analog Integrated Circuit Device Data
Freescale Semiconductor
25
34703
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
switcher output voltage exceeds the LDO output by
more than 300 mV.
6. LDO > VOUT, reset (4) and (5) above. Normal operation
resumes when LDO > VOUT.
Inverted Power Sequencing Control
Comparators monitor voltage differences between the
switcher (VOUT terminal) and LDO (LDO terminal) outputs as
follows:
1. VOUT > LDO + 2.2 V, turn off VOUT. The switcher VOUT
can be forced off. This occurs whenever the VOUT
output voltage exceeds the LDO output voltage by
more than 2.3 V.
2. VOUT > LDO + 2.4 V, shunt VOUT to ground. If turning
off the switcher VOUT is insufficient and the VOUT
output voltage exceeds the LDO output voltage by
more than 2.4 V, a 1.0 shunt FET is turned on that
discharges the VOUT load capacitor to ground. The
shunt FET is used for LDO output shorts to ground and
for power-down in case of VIN1 ≠ VIN2 with LDO output
falling faster than the VOUT.
3. VOUT < LDO + 2.2 V, cancel (1) and (2) above, re-
enable VOUT. Normal operation resumes when the
VOUT output voltage is less than 2.2 V above the LDO
output voltage.
4. VOUT < LDO - 0.2 V, turn off LDO. The LDO can be
forced off. This occurs whenever the VOUT is less than
VLDO - 0.2 V.
5. VOUT < LDO - 0.3 V, turn on the 1.0 LDO sink FET.
This occurs when the LDO output voltage exceeds the
VOUT output by more than 300 mV.
6. VOUT > LDO, reset (4) and (5) above. Normal operation
resumes when VOUT > LDO.
STANDARD OPERATING MODE
Single 3.3 V Supply, VIN = VIN1 = VIN2 = 3.3 V
The 3.3 V supplies the microprocessor I/O voltage, the
switcher supplies core voltage (e.g., 1.8 V nominal), and the
Power sequencing depends only on the normal switcher
intrinsic operation to control the Buck High-Side FET.
Power Up
When VIN is rising, initially VOUT will be below the
regulation point and the Buck High-Side FET will be on. In
order not to exceed the 2.5 V differential requirement
between the I/O (VIN) and the core (VOUT), the switcher must
start up at 2.5 V or less and be able to maintain the 2.5 V or
less differential. The maximum slew rate for VIN is 1.0 V/ms.
Power Down
When VIN is falling, VOUT will be below the regulation point;
therefore the Buck High-Side FET will be on. In the case
where VOUT is falling faster than VIN, the Buck High-Side FET
will attempt to maintain VOUT. In the case where VIN is falling
faster than VOUT, the Buck High-Side FET is also on, and the
VOUT load capacitor will be discharged through the Buck
High-Side FET to VIN. Thus, provided VIN does not fall too
fast, the core voltage (VOUT) will not exceed the I/O voltage
(VIN) by more than a maximum of 0.4 V.
Shorted Load
1. VOUT shorted to ground. This will cause the I/O voltage
to exceed the core voltage by more than 2.5 V. The
load is protected by a current limit.
2. VIN shorted to ground. Until the switcher load
capacitance is discharged, the core voltage will exceed
the I/O voltage by more than 0.4 V. By the intrinsic
operation of the switcher, the load capacitor will be
discharged rapidly through the Buck High-Side FET to
VIN.
3. VOUT shorted to supply. No load protection. 34703
protected by a thermal limit.
Single 5.0 V Supply, VIN1 = VIN2, or Dual Supply VIN1 ≠
VIN2
The LDO supplies the microprocessor I/O voltage. The
switcher supplies the core (e.g., 1.8 V nominal) (see
Power Up
This condition depends upon the regulator current limit,
load current and capacitance, and the relative rise times of
the VIN1 and VIN2 supplies. There are 2 cases:
1. LDO rises faster than VOUT. The LDO uses control
methods (1) and (2) described in the Methods of
2. VOUT rises faster than LDO. The switcher uses control
methods (4) and (5) described in the Methods of
Control section.
Power Down
This condition depends upon the regulator load current
and capacitance and the relative fall times of the VIN1 and
VIN2 supplies. There are 2 cases:
1. VOUT falls faster than LDO. The LDO uses control
methods (1) and (2) described in the Methods of
In the case VIN1 = VIN2 the intrinsic operation will turn on
both the Buck High-Side FET and the LDO external Pass
FET, and will discharge the LDO load capacitor into the
VIN supply.
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