参数资料
型号: PCA85176H/Q900/1,5
厂商: NXP Semiconductors
文件页数: 30/59页
文件大小: 0K
描述: IC LCD DRIVER 40SEG 64TQFP
产品培训模块: I²C Bus Fundamentals
标准包装: 1
显示器类型: LCD
配置: 40 段
接口: I²C
电流 - 电源: 80µA
电源电压: 1.8 V ~ 5.5 V
工作温度: -40°C ~ 95°C
安装类型: 表面贴装
封装/外壳: 64-TQFP
供应商设备封装: 64-TQFP(10x10)
包装: 标准包装
其它名称: 568-5108-6
NXP Semiconductors
PCA85176
Automotive LCD driver for low multiplex rates
MASTER
TRANSMITTER/
RECEIVER
SLAVE
RECEIVER
SLAVE
TRANSMITTER/
RECEIVER
MASTER
TRANSMITTER
MASTER
TRANSMITTER/
RECEIVER
SDA
SCL
mga807
Fig 19. System configuration
8.4 Acknowledge
The number of data bytes transferred between the START and STOP conditions from
transmitter to receiver is unlimited. Each byte of eight bits is followed by an acknowledge
cycle.
? A slave receiver, which is addressed, must generate an acknowledge after the
reception of each byte
? A master receiver must generate an acknowledge after the reception of each byte that
has been clocked out of the slave transmitter
? The device that acknowledges must pull-down the SDA line during the acknowledge
clock pulse, so that the SDA line is stable LOW during the HIGH period of the
acknowledge related clock pulse (set-up and hold times must be taken into
consideration)
? A master receiver must signal an end of data to the transmitter by not generating an
acknowledge on the last byte that has been clocked out of the slave. In this event, the
transmitter must leave the data line HIGH to enable the master to generate a STOP
condition
Acknowledgement on the I 2 C-bus is illustrated in Figure 20 .
data output
by transmitter
not acknowledge
data output
by receiver
acknowledge
SCL from
master
1
2
8
9
S
START
condition
clock pulse for
acknowledgement
mbc602
Fig 20. Acknowledgement of the I 2 C-bus
PCA85176
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 11 July 2013
? NXP B.V. 2013. All rights reserved.
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