参数资料
型号: PCA9574PW,112
厂商: NXP Semiconductors
文件页数: 33/33页
文件大小: 0K
描述: IC I/O EXPANDER I2C 8B 16TSSOP
标准包装: 96
接口: I²C,SM 总线
输入/输出数: 8
中断输出:
频率 - 时钟: 400kHz
电源电压: 1.1 V ~ 3.6 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 16-TSSOP
包装: 带卷 (TR)
包括: POR
其它名称: 935285149112
PCA9574PW
PCA9574PW-ND
PCA9574
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 4 — 25 April 2012
9 of 33
NXP Semiconductors
PCA9574
8-bit I2C-bus and SMBus, level translating, low volage GPIO
7.5.3 Register 2 - Bus-hold/pull-up/pull-down enable register
Bit 0 of this register allows the user to enable/disable the bus-hold feature for the I/O pins.
Setting the bit 0 to logic 1 enables bus-hold feature for the I/O bank. In this mode, the
pull-up/pull-downs will be disabled. Setting the bit 0 to logic 0 disables bus-hold feature.
Bit 1 of this register allows the user to enable/disable pull-up/pull-downs on the I/O pins.
Setting the bit 1 to logic 1 enables selection of pull-up/pull-down using Register 3. Setting
the bit 1 to logic 0 disables pull-up/pull-downs on the I/O pins and contents of Register 3
will have no effect on the I/O.
Table 7.
Register 2 - Bus-hold/pull-up/pull-down enable register (address 02h) bit
description
Legend: * default value.
Bit
Symbol
Access
Value
Description
7
E0.7
R/W
X
not used
6E0.6
R/W
X
5E0.5
R/W
X
4E0.4
R/W
X
3E0.3
R/W
X
2E0.2
R/W
X
1
E0.1
R/W
0*
allows the user to enable/disable pull-up/pull-downs on the
I/O pins
0 = disables pull-up/pull-downs on the I/O pins and
contents of Register 3 will have no effect on the I/O
(default value)
1 = enables selection of pull-up/pull-down using
Register 3
0
E0.0
R/W
0*
allows user to enable/disable the bus-hold feature for the I/O
pins
0 = disables bus-hold feature (default value)
1 = enables bus-hold feature
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