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参数资料
| 型号： | PCF8534AU/DA/1,026 |
| 厂商： | NXP Semiconductors |
| 文件页数： | 17/52页 |
| 文件大小： | 0K |
| 描述： | IC LCD DISPLAY DVR 60SEG |
| 标准包装： | 720 |
| 显示器类型： | LCD |
| 配置： | 60 段 |
| 接口： | I²C |
| 电流 - 电源： | 8µA |
| 电源电压： | 1.8 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 模具 |
| 供应商设备封装： | 模具 |
| 包装： | 托盘 - 晶粒 |
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NXP Semiconductors
PCF8534A
Universal LCD driver for low multiplex rates
7.5 Oscillator
The internal logic and the LCD drive signals of the PCF8534A are timed by the frequency
f clk . It equals either the built-in oscillator frequency f osc or the external clock frequency
f clk(ext) . The clock frequency f clk determines the LCD frame frequency (f fr ).
7.5.1 Internal clock
The internal oscillator is enabled by connecting pin OSC to pin V SS . In this case, the
output from pin CLK is the clock signal for any cascaded PCF8534A in the system.
7.5.2 External clock
Pin CLK is enabled as an external clock input by connecting pin OSC to V DD .
Remark: A clock signal must always be supplied to the device. Removing the clock may
freeze the LCD in a DC state, which is not suitable for the liquid crystal.
7.6 Timing
The PCF8534A timing controls the internal data flow of the device. This includes the
transfer of display data from the display RAM to the display segment outputs. In cascaded
applications, the correct timing relationship between each PCF8534A in the system is
maintained by the synchronization signal at pin SYNC. The timing also generates the LCD
frame signal whose frequency is derived from the clock frequency. The frame signal
frequency is a fixed division of the clock frequency from either the internal or an external
clock.
Table 6.
LCD frame frequencies
f fr = --------
Operating mode ratio
f clk
24
Frame frequency with respect to f clk (typical)
f clk = 1536 Hz
64
Unit
Hz
7.7 Display register
The display register holds the display data while the corresponding multiplex signals are
generated.
7.8 Segment outputs
The LCD drive section includes 60 segment outputs (S0 to S59) which should be
connected directly to the LCD. The segment output signals are generated based on the
multiplexed backplane signals and with data resident in the display register. When less
than 60 segment outputs are required, the unused segment outputs must be left
open-circuit.
PCF8534A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 25 July 2011
? NXP B.V. 2011. All rights reserved.
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相关代理商/技术参数 |
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| PCF8534H | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Universal LCD driver for low multiplex rates |
| PCF8535 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:65 x 133 pixel matrix driver |
| PCF8535U | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:65 x 133 pixel matrix driver |
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| PCF85363ATL/AX | 功能描述:Real Time Clock (RTC) IC Clock/Calendar I2C, 2-Wire Serial 10-XFDFN Exposed Pad 制造商:nxp semiconductors 系列:- 包装:剪切带（CT） 零件状态:有效 类型:时钟/日历 特性:警报器，闰年，监视计时器 存储容量:- 时间格式:HH：MM：SS：hh（12/24 小时） 日期格式:YY-MM-DD-dd 接口:I2C，2 线串口 电压 - 电源:0.9 V ~ 5.5 V 电压 - 电源，电池:0.9 V ~ 5.5 V 电流 - 计时（最大）:0.885μA @ 3.3V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:10-XFDFN 裸露焊盘 供应商器件封装:10-DFN（2.6x2.6） 标准包装:1 |
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