- 您现在的位置：买卖IC网 > PDF目录20193 > PCF8534AU/DA/1,026 (NXP Semiconductors)IC LCD DISPLAY DVR 60SEG PDF资料下载
参数资料
| 型号： | PCF8534AU/DA/1,026 |
| 厂商： | NXP Semiconductors |
| 文件页数： | 18/52页 |
| 文件大小： | 0K |
| 描述： | IC LCD DISPLAY DVR 60SEG |
| 标准包装： | 720 |
| 显示器类型： | LCD |
| 配置： | 60 段 |
| 接口： | I²C |
| 电流 - 电源： | 8µA |
| 电源电压： | 1.8 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 模具 |
| 供应商设备封装： | 模具 |
| 包装： | 托盘 - 晶粒 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页当前第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页
NXP Semiconductors
PCF8534A
Universal LCD driver for low multiplex rates
7.9 Backplane outputs
The LCD drive section includes four backplane outputs BP0 to BP3 which must be
connected directly to the LCD. The backplane output signals are generated in accordance
with the selected LCD drive mode.
? In 1:4 multiplex drive mode: BP0 to BP3 must be connected directly to the LCD.
If less than four backplane outputs are required, the unused outputs can be left
open-circuit.
? In 1:3 multiplex drive mode BP3 carries the same signal as BP1, therefore these two
adjacent outputs can be tied together to give enhanced drive capabilities.
? In 1:2 multiplex drive mode BP0 and BP2, respectively, BP1 and BP3 carry the same
signals and can also be paired to increase the drive capabilities.
? In static drive mode, the same signal is carried by all four backplane outputs and they
can be connected in parallel for very high drive requirements.
7.10 Display RAM
The display RAM is a static 60 ? 4-bit RAM which stores LCD data. A logic 1 in the RAM
bit map indicates the on-state (V on(RMS) ) of the corresponding LCD element. Similarly, a
logic 0 indicates the off-state (V off(RMS) ). For more information on V on(RMS) and V off(RMS) ,
see Section 7.3 .
There is a one-to-one correspondence between
? the bits in the RAM bitmap and the LCD elements
? the RAM columns and the segment outputs
? the RAM rows and the backplane outputs.
The display RAM bit map, Figure 12 , shows row 0 to row 3 which correspond with the
backplane outputs BP0 to BP3, and column 0 to column 59 which correspond with the
segment outputs S0 to S59. In multiplexed LCD applications, the data of each row of the
display RAM is time-multiplexed with the corresponding backplane (row 0 with BP0, row 1
with BP1, and so on).
columns
display RAM addresses/segment outputs (S)
rows
0
1
2
3
4
55
56
57
58
59
0
display RAM rows/
backplane outputs 1
(BP)
2
3
013aaa212
The display RAM bit map shows the direct relationship between the display RAM addresses and
the segment outputs and between the bits in a RAM word and the backplane outputs.
Fig 12. Display RAM bit map
PCF8534A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 25 July 2011
? NXP B.V. 2011. All rights reserved.
18 of 52
相关PDF资料 |
PDF描述 |
|---|---|
| MR750RL | DIODE STD REC 6A 50V AXIAL |
| TAJS335K010RNJ | CAP TANT 3.3UF 10V 10% 1206 |
| T95R227M6R3HZAL | CAP TANT 220UF 6.3V 20% 2824 |
| T95R227K6R3HZAL | CAP TANT 220UF 6.3V 10% 2824 |
| NCV317BD2TG | IC REG LDO ADJ .5A D2PAK |
相关代理商/技术参数 |
参数描述 |
|---|---|
| PCF8534H | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Universal LCD driver for low multiplex rates |
| PCF8535 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:65 x 133 pixel matrix driver |
| PCF8535U | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:65 x 133 pixel matrix driver |
| PCF8536 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:I2C/SPI LCD and PWM LED controller for industrial and automotive applications |
| PCF85363ATL/AX | 功能描述:Real Time Clock (RTC) IC Clock/Calendar I2C, 2-Wire Serial 10-XFDFN Exposed Pad 制造商:nxp semiconductors 系列:- 包装:剪切带（CT） 零件状态:有效 类型:时钟/日历 特性:警报器，闰年，监视计时器 存储容量:- 时间格式:HH：MM：SS：hh（12/24 小时） 日期格式:YY-MM-DD-dd 接口:I2C，2 线串口 电压 - 电源:0.9 V ~ 5.5 V 电压 - 电源，电池:0.9 V ~ 5.5 V 电流 - 计时（最大）:0.885μA @ 3.3V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:10-XFDFN 裸露焊盘 供应商器件封装:10-DFN（2.6x2.6） 标准包装:1 |
发布紧急采购，3分钟左右您将得到回复。