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参数资料
| 型号： | PCF8534AU/DA/1,026 |
| 厂商： | NXP Semiconductors |
| 文件页数： | 21/52页 |
| 文件大小： | 0K |
| 描述： | IC LCD DISPLAY DVR 60SEG |
| 标准包装： | 720 |
| 显示器类型： | LCD |
| 配置： | 60 段 |
| 接口： | I²C |
| 电流 - 电源： | 8µA |
| 电源电压： | 1.8 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 模具 |
| 供应商设备封装： | 模具 |
| 包装： | 托盘 - 晶粒 |
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NXP Semiconductors
PCF8534A
Universal LCD driver for low multiplex rates
In cascaded applications each PCF8534A in the cascade must be addressed separately.
Initially, the first PCF8534A is selected by sending the device-select command matching
the first hardware subaddress. Then the data pointer is set to the preferred display RAM
address by sending the load-data-pointer command.
Once the display RAM of the first PCF8534A has been written, the second PCF8534A is
selected by sending the device-select command again. This time however the command
matches the hardware subaddress of the second device. Next the load-data-pointer
command is sent to select the preferred display RAM address of the second PCF8534A.
This last step is very important because during writing data to the first PCF8534A, the
data pointer of the second PCF8534A is incremented. In addition, the hardware
subaddress should not be changed while the device is being accessed on the I 2 C-bus
interface.
7.10.3 RAM writing in 1:3 multiplex drive mode
In 1:3 multiplex drive mode, the RAM is written as shown in Table 7 (see Figure 13 as
well).
Table 7. Standard RAM filling in 1:3 multiplex drive mode
Assumption: BP2/S2, BP2/S5, BP2/S8 etc. are not connected to any elements on the display.
Display RAM
Display RAM addresses (columns)/segment outputs (Sn)
bits (rows)/
backplane
0
1
2
3
4
5
6
7
8
9
:
outputs (BPn)
0
1
2
3
a7
a6
a5
-
a4
a3
a2
-
a1
a0
-
-
b7
b6
b5
-
b4
b3
b2
-
b1
b0
-
-
c7
c6
c5
-
c4
c3
c2
-
c1
c0
-
-
d7
d6
d5
-
:
:
:
:
If the bit at position BP2/S2 would be written by a second byte transmitted, then the
Table 8. Entire RAM filling by rewriting in 1:3 multiplex drive mode
Assumption: BP2/S2, BP2/S5, BP2/S8 etc. are connected to elements on the display.
Display RAM
Display RAM addresses (columns)/segment outputs (Sn)
bits (rows)/
backplane
0
1
2
3
4
5
6
7
8
9
:
outputs (BPn)
0
1
a7
a6
a4
a3
a1/b7 b4
a0/b6 b3
b1/c7 c4
b0/c6 c3
c1/d7 d4
c0/d6 d3
d1/e7 e4
d0/e6 e3
:
:
2
3
a5
-
a2
-
b5
-
b2
-
c5
-
c2
-
d5
-
d2
-
e5
-
e2
-
:
:
In the case described in Table 8 the RAM has to be written entirely and BP2/S2, BP2/S5,
BP2/S8, and so on, have to be connected to elements on the display. This can be
achieved by a combination of writing and rewriting the RAM like follows:
PCF8534A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 25 July 2011
? NXP B.V. 2011. All rights reserved.
21 of 52
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相关代理商/技术参数 |
参数描述 |
|---|---|
| PCF8534H | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Universal LCD driver for low multiplex rates |
| PCF8535 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:65 x 133 pixel matrix driver |
| PCF8535U | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:65 x 133 pixel matrix driver |
| PCF8536 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:I2C/SPI LCD and PWM LED controller for industrial and automotive applications |
| PCF85363ATL/AX | 功能描述:Real Time Clock (RTC) IC Clock/Calendar I2C, 2-Wire Serial 10-XFDFN Exposed Pad 制造商:nxp semiconductors 系列:- 包装:剪切带（CT） 零件状态:有效 类型:时钟/日历 特性:警报器，闰年，监视计时器 存储容量:- 时间格式:HH：MM：SS：hh（12/24 小时） 日期格式:YY-MM-DD-dd 接口:I2C，2 线串口 电压 - 电源:0.9 V ~ 5.5 V 电压 - 电源，电池:0.9 V ~ 5.5 V 电流 - 计时（最大）:0.885μA @ 3.3V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:10-XFDFN 裸露焊盘 供应商器件封装:10-DFN（2.6x2.6） 标准包装:1 |
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