参数资料
型号: PCM3052ARTFG4
厂商: TEXAS INSTRUMENTS INC
元件分类: 编解码器
英文描述: PCM CODEC, PQCC32
封装: GREEN, PLASTIC, VQFN-32
文件页数: 30/47页
文件大小: 776K
代理商: PCM3052ARTFG4
www.ti.com
ADPSV: ADC Power-Save Control (ADC)
DAPSV: DAC Power-Save Control (DAC)
OVR1: Oversampling Rate Control (DAC)
MUTx: Soft-Mute Control (DAC)
PCM3052A
SLES160 – NOVEMBER 2005
SRST = 0
Re-synchronization
SRST = 1
Normal operation (default)
The SRST bit controls system reset. The PCM3052A does not go into power-down state. The mode control
register is not reset by this control. Also pop-noise may be generated.
Default value: 0
ADPSV = 0
Normal operation (default)
ADPSV = 1
Power-save mode
The ADPSV bit controls ADC power-save mode. In power-save mode, ADC goes into power-down state, the
data in ADC are reset, and DOUT is forced into ZERO immediately. I2C control is enabled.
Default value: 0
DAPSV = 0
Normal operation (default)
DAPSV = 1
Power-save mode
The DAPSV bit controls the DAC power-save mode. In the power-save mode, the DAC output is faded out and
DAC goes into the power-down state. I2C control is enabled. A waiting time of more than 2100/fS from
power-save-mode assertion is required for the release of the power-save mode.
DIT function is available if SPDIF bit = 1, even though DAPSV = 1.
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
REGISTER 68
0
1
0
1
0
RSV
OVR1
RSV
MUT2
MUT1
Default value: 0
OVR1 = 0
64
× oversampling (default)
OVR1 = 1
128
× oversampling
The OVR1 bit is used to control the oversampling rate of the delta-sigma D/A converters. To write over this
register during normal operation may generate noise.
where, x = 1 or 2, corresponding to the DAC output VOUTL (x = 1) and VOUTR (x = 2).
Default value: 0
MUTx = 0
Mute disabled (default)
MUTx = 1
Mute enabled
The mute bits, MUT1 and MUT2, are used to enable or disable the soft-mute function for the corresponding DAC
outputs, VOUTL and VOUTR. The soft-mute function is incorporated into the digital attenuators. When mute is
disabled (MUTx = 0), the attenuator and DAC operate normally. When mute is enabled by setting MUTx = 1, the
digital attenuator for the corresponding output is decreased from the current setting to infinite attenuation, one
attenuator step (0.5 dB) for every 8/fS seconds. This provides pop-free muting of the DAC output.
By setting MUTx = 0, the attenuator is increased one step for every 8/fS seconds to the previously programmed
attenuation level.
36
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