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参数资料
| 型号： | PCZ34670EG |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 稳压器 |
| 英文描述： | SWITCHING REGULATOR, 400 kHz SWITCHING FREQ-MAX, PDSO20 |
| 封装： | 1.27 PITCH, ROHS COMPLIANT, PLASTIC, MS-013AC, SOIC-20 |
| 文件页数： | 6/24页 |
| 文件大小： | 986K |
| 代理商： | PCZ34670EG |
Analog Integrated Circuit Device Data
14
Freescale Semiconductor
34670
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
signature resistor, the total resistance of R1+R2 must equal
25 k
.
Figure 13. UVLO Adjustment by External
Resistor Divider
To use the default settings for UVLO, the pin UVLO must
be connected to VIN. In this case, a valid signature resistor
has to be placed between -VPORT and +VPORT. This
configuration can be seen in Figure 14.
Figure 14. Default UVLO Settings
To calculate the values for R1 and R2 the following
equations should be used:
where VUVLO(ON) is the desired turn-on voltage threshold and
VUVLO(ref) the UVLO reference voltage.
The typical turn-off voltage VUVLO(OFF) is 85% of the turn
on voltage VUVLO(ON).
INRUSH CURRENT LIMITATION
The 34670 has been designed to interface also with legacy
PoE-PSEs which do not meet the inrush current requirement
of the IEEE 802.3af specification. By setting the initial inrush
current limit to a low level, a PD using the 34670 minimizes
the current drawn from the PSE during start-up. The
maximum inrush current level can be set by connecting a
Figure 15. Inrush Current Limitation by External
Resistor RILIM
The following table shows the selectable current limits and
the corresponding resistor value that has to be connected
between pins ILIM and VIN:
After powering up, the 34670 switches to the high level
current limit, thereby allowing the PD to consume up to
12.95 W if a 802.3af PSE is present.
PULSE WITH MODULATOR CONTROLLER
CURRENT-MODE CONTROL OPERATION
The 34670 offers current-mode control operation with
leading-edge blanking. The current-limit comparator monitors
the CS pin at all times and provides cycle-by-cycle current
limit.
The CS signal contains a leading-edge spike that is the
result of the MOSFET gate charge current, capacitive and
diode reverse recovery current of the power circuit. The
leading-edge blanking of the CS signal prevents the PWM
comparator from premature termination of the on cycle.
The 34670 limits the duty cycle to 50%. This is
advantageous for applications which are not allowed to
exceed an on-time of 50 % of the switching period TS. Beside
the duty-cycle limit, slope compensation is provided to
stabilize the inner current loop and avoid oscillations for
R2
R1
-VPORT
+VPORT
RCLA
VPWR
UVLO
ILIM
VIN
RSIG
25k
-VPORT
+VPORT
RCLA
VPWR
UVLO
ILIM
VIN
R
1
R
2
+R
SIG
=
R
2
V
UVLO REF
()
V
UVLO ON
()
---------------------------------- R
SIG
=
Table 9. Inrush Current Limit vs. RILIM
Inrush Current Limit [mA]
RILIM Value [k]
180
12.1
110
42.2
65
191
R
1
R
SIG
R
2
–
=
V
UVLO OFF
()
V
UVLO ON
()
0.85
=
RSIG
25k
-VPORT
+VPORT
RCLA
VPWR
UVLO
ILIM
VIN
RILIM
RCLASS
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| PD 1/8-0 | 制造商:TE Connectivity 功能描述:HEATSHRINK END CAP 3.2MM PK100 制造商:TE Connectivity 功能描述:HEATSHRINK, END CAP, 3.2MM, PK100 制造商:TE Connectivity 功能描述:HEATSHRINK, END CAP, 3.2MM, PK100, I.D. Supplied - Metric:3.2mm, I.D. Supplied - 制造商:TE Connectivity 功能描述:HEATSHRINK, END CAP, 3.2MM, PK100, I.D. Supplied - Metric:3.2mm, I.D. Supplied - Imperial:0.125", I.D. Recovered Max - Metric:0.58mm, I.D. Recovered Max - Imperial:0.022", Shrink Ratio:3:1, Shrink Tubing / Boot Material:PO , RoHS Compliant: Yes |
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