参数资料
型号: PD70201ILQ-TR
厂商: MICROSEMI CORP-ANALOG MIXED SIGNAL GROUP
元件分类: 稳压器
英文描述: SWITCHING CONTROLLER, 500 kHz SWITCHING FREQ-MAX, PQCC32
封装: 5 X 5 MM, ROHS COMPLIANT, PLASTIC, QFN-32
文件页数: 2/19页
文件大小: 416K
代理商: PD70201ILQ-TR
PD70101 & PD70201
PRELIMINARY DATA SHEET
Copyright 2010
Microsemi
Page 10
Rev. 0.6, 21-Jan-2011
Analog Mixed Signal Group
11861 Western Avenue, Garden Grove, CA 92841; 714-898-8121; Fax: 714-893-2570
P
D
7
0
1
0
1
&
P
D
7
0
2
0
1
PD70101 / PD70201: IEEE 802.3 af/at
Power Over Ethernet PD Controller
TM
P D 7 0 1 0 1 / P D 7 0 2 0 1 P I N D E S C R I P T I O N
Pin
PD70101 Pin
Name
PD70201 Pin
Name
Description
1
RDET
Valid Detection Resistor: Connect a 24.9kΩ, 1% resistor from this pin to
VPP
2
PGOOD
Open Drain Output (active low): This flag is generated to indicate the power
rails (VPN_OUT) are ready
3
RREF
Bias current resistor for the PD Interface.
4
RCLASS
Power Classification Setting: Connect external class resistor between this
pin and VPN_IN.
5
VPN_IN
VPort Negative Input: Connected to the isolating switch input N-channel
MOSFET source.
6
N/C
Not Used
7
N/C
AT_FLAG
Open Drain Output (active low): This flag indicates if the chip detects an
IEEE 802.3at compliant PSE.
8
VPN_OUT
VPort Negative Output:
Connected to the isolating switch output.
N-
channel MOSFET Drain.
9
N/C
Not Used
10
ENABLE
Logic level Enable input for DC-DC controller. Pulling this pin to VL turns
on the DC-DC controller. This allows the DC-DC controller to be turned on
without power to the PD interface.
11
VINS
VPP input voltage sensing for UVLO comparator. Connect to an external
resistor divider from VPP to GND. Threshold is 1.2V reference.
12
HYST
Output of the VINS/UVLO comparator.
This pin is used for VPP UVLO
hysteresis programming, or as the Power Fail Warning flag.
13
SYNC
External Clock synchronization for the DC-DC controller. Connect an
external clock as defined in the EC table to this pin to synchronize the DC-
DC converter switching frequency to this clock. PG rising edge is
synchronize with the clock rising edge.
14
VINS_SEL
UVLO/PFW select Logic Input. Internally pulled low for VINS Power Fail
Warning (PFW) flag. Pull to logic high to use as VINS UVLO
15
RFREQ
DC-DC Switching Frequency Setting. Connect a resistor from this pin to
GND to set the switching frequency
16
SS
Soft-start: Connect a capacitor from this pin to GND to set the soft-start time
of the DC-DC converter. This capacitor is charged with an internal current
source to 1.2V
17
RCLP
Low Power Mode Clamp. Connect a resistor from this pin to GND to
program the LPM clampimg voltage or connect this pin to GND to disable
LPM.
18
VSN
Differential Amplifier's negative input. Connect this to the junction of a
resistor divider from Vo- to GND for the Direct Buck converter application
19
VSP
Differential Amplifier's positive input. Connect this to the junction of a
resistor divider from Vo+ to GND for the Direct Buck converter application
20
COMP
Error Amplifier Output. Short to FB pin when driven directly with an
optoisolator for Isolated DC-DC Converter. Connect to FB via RC
compensation networks for Non-Isolated Direct Buck Converter.
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