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参数资料
| 型号： | PE43602MLI-Z |
| 厂商： | Peregrine Semiconductor |
| 文件页数： | 7/11页 |
| 文件大小： | 0K |
| 描述： | IC RF DSA 6BIT 50 OHM 24-QFN |
| 标准包装： | 1 |
| 系列： | UltraCMOS™, HaRP™ |
| 衰减值： | 31.5dB |
| 容差： | ±0.3dB |
| 频率范围： | 9kHz ~ 5GHz |
| 阻抗： | 50 欧姆 |
| 封装/外壳： | 24-VFQFN 裸露焊盘 |
| 其它名称： | 1046-1046-6 |
PE43602
Product Specification
Figure 15. Serial Timing Diagram
Bits can either be set to logic high or logic low
D[0] and D[7] must be set to logic low
DI[6:1]
P/S
T DISU
T PSSU
T DIH
T PSIH
SI
D[0]
D[1]
D[2]
D[3]
D[4]
D[5]
D[6]
D[7]
CLK
T SISU
T SIH
LE
T CLKL
T CLKH
T LESU
DO[6:0]
Figure 16. Latched-Parallel/Direct-Parallel Timing Diagram
P/S
T LEPW
T PD
VALID
DI[6:1]
T PSSU
VALID
T PSIH
LE
DO[6:1]
T DISU
T LEPW
T DIPD
VALID
T PD
T DIH
Table 10. Serial Interface AC Characteristics
V DD = 3.3 or 5.0 V, -40° C < T A < 85° C, unless otherwise specified
Table 11. Parallel and Direct Interface AC
Characteristics
Symbol Parameter
Min.
Max.
Unit
V DD = 3.3 or 5.0 V, -40° C < T A < 85° C, unless otherwise specified
F CLK
T CLKH
T CLKL
T LESU
T LEPW
T SISU
T SIH
T DISU
T DIH
T ASU
T AH
Serial clock frequency
Serial clock HIGH time
Serial clock LOW time
Last serial clock rising edge
setup time to Latch Enable
rising edge
Latch Enable minimum pulse
width
Serial data setup time
Serial data hold time
Parallel data setup time
Parallel data hold time
Address setup time
Address hold time
-
30
30
10
30
10
10
100
100
100
100
10
-
-
-
-
-
-
-
-
-
-
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Symbol
T LEPW
T DISU
T DIH
T PSSU
T PSIH
T PD
T DIPD
Parameter
Latch Enable minimum
pulse width
Parallel data setup time
Parallel data hold time
Parallel/Serial setup time
Parallel/Serial hold time
Digital register delay
(internal)
Digital register delay
(internal, direct mode only)
Min
30
100
100
100
100
-
-
Max
-
-
-
-
-
10
5
Unit
ns
ns
ns
ns
ns
ns
ns
T PSSU
T PSH
T PD
Parallel/Serial setup time
Parallel/Serial hold time
Digital register delay (internal)
100
100
-
-
-
10
ns
ns
ns
Document No. 70-0248-05 │ www.psemi.com
?2008-2009 Peregrine Semiconductor Corp. All rights reserved.
Page 7 of 11
Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com
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