- 您现在的位置：买卖IC网 > PDF目录378049 > PEF22554E (INFINEON TECHNOLOGIES AG) Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 PDF资料下载
参数资料
| 型号： | PEF22554E |
| 厂商： | INFINEON TECHNOLOGIES AG |
| 元件分类： | 通信及网络 |
| 英文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 中文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 文件页数： | 16/30页 |
| 文件大小： | 914K |
| 代理商： | PEF22554E |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页当前第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页
QuadFALC
PEF 22554
Overview
Delta Sheet
16/30
2002-09-16
1.11
Flexible Clock Mode Settings
The register settings for flexible master clock can be calculated as follows. For some
standard frequencies see
Table 5
below. The variables used in these calculations are
located in registers GCM1 to GCM8.
1. PLL_M and PLL_N must fulfill the equations:
a.
for PLL_M = 0 to 31:
b.
for PLL_N = 25 to 63:
for PLL_N = 0 to 24:
Attention: To decrease sensitivity of PLL to noise on V
DDP
and/or V
SSP
adjust
f
pdref
as high as possible.
c.
4
PLL_N
(
×
PLL_M
(as high as possible within this range)
2. Selection of dividing mode to best fulfill:
Though the target frequency might not be met directly, the dividing mode has to be
selected to reach a frequency which is as near as possible to the target frequency.
f
pdref
f
PLL_M + 1
---------------------------
=
1.0 MHz
f
pdref
6.0 MHz
≤
≤
5.0 MHz
f
pdref
15.0 MHz
≤
≤
260 MHz
f
MCLK
1
)
+
------------------------------+
×
395.26 MHz
≤
≤
f
outE1
f
MCLK
4
PLL_N
PHSX_E1
6
)
PHSN_E1
------------------------
+
PLL_M
1
+
(
)
×
------------------------------------------------------------+
×
=
2
16.384 MHz
×
f
outT1
f
MCLK
4
PLL_N
PHSX_T1
6
1
+
(
)
×
PHSN_T1
------------------------
+
PLL_M
1
+
(
)
×
-----------------------------------------------------------------------------------------------------
×
=
2
12.352 MHz
×
相关PDF资料 |
PDF描述 |
|---|---|
| PEF22554HT | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| PEF2256 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| PEF2256E | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| PEF2256H | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| PEF22810 | ETHERNET OVER VDSL CHIPSET |
相关代理商/技术参数 |
参数描述 |
|---|---|
| PEF22554E-V2.1 | 制造商:Infineon Technologies AG 功能描述:DATACOM, FRAMER, PBGA160 |
| PEF22554EV2.1-G | 功能描述:网络控制器与处理器 IC T/E RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| PEF22554EV21 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| PEF22554EV3.1 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| PEF22554EV3.1-G | 功能描述:网络控制器与处理器 IC T/E RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
发布紧急采购，3分钟左右您将得到回复。