参数资料
型号: PGA112AIDGSRG4
厂商: TEXAS INSTRUMENTS INC
元件分类: 模拟信号调理
英文描述: SPECIALTY ANALOG CIRCUIT, PDSO10
封装: GREEN, PLASTIC, MSOP-10
文件页数: 27/47页
文件大小: 1545K
代理商: PGA112AIDGSRG4
10kW
ADC
G=1
R
F
R
I
Output
Stage
SPI
Interface
SCLK
DIO
CS
V
OUT
DV
DD
AV
DD
GND
V
REF
MSP430
Microcontroller
+3V
V
REF
PGA112
PGA113
V
/CH0
CAL
CH1
CAL3
CAL4
CAL1
CAL2
0.1V
CAL
0.9V
CAL
10kW
80kW
MUX
CAL2/3
ADCRef
OPA364
R
10kW
F
C
2.7nF
F
+3V
C
L2
0.1 F
m
0.1 F
m
R
Y
100kW
R
X
100kW
+3V
(1.5V)
C
0.1 F
BYPASS
m
C
0.1 F
BYPASS
m
C
0.1 F
BYPASS
m
C
0.1 F
BYPASS
m
www.ti.com ............................................................................................................................................ SBOS424B – MARCH 2008 – REVISED SEPTEMBER 2008
Figure 74. Using CAL Channels with VREF = AVDD/2
Table 10. Using the MUX CAL Channels with VREF = AVDD/2
(AVDD = 3V, DVDD = 3V, ADC Ref = 3V, and VREF = 1.5V)
MUX
GAIN
OP AMP
FUNCTION
SELECT
MUX INPUT
(+In)
(VOUT)
DESCRIPTION
Minimum signal level that the MUX,
Minimum Signal
CAL1
1
GND
50mV
op amp, and ADC can read. Op amp
VOUT is limited by negative saturation.
0.9 ×
90% ADC Ref for system full-scale or
Gain Calibration
CAL2
1
2.7V
(VCAL/CH0)
gain calibration of the ADC.
Maximum signal level that the MUX,
0.9 ×
Maximum Signal
CAL2
4 or 5
2.25V
2.95V
op amp, and ADC can read. Op amp
(VCAL/CH0)
VOUT is limited by positive saturation.
0.1 ×
10% ADC Ref for system offset
Offset Calibration
CAL3
1
0.3V
(VCAL/CH0)
calibration of the ADC.
VREF Check
CAL4
1
VREF
1.5V
Midsupply voltage used as VREF.
Copyright 2008, Texas Instruments Incorporated
33
Product Folder Link(s): PGA112 PGA113 PGA116 PGA117
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