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参数资料
| 型号： | PGA112AIDGSRG4 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 模拟信号调理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PDSO10 |
| 封装： | GREEN, PLASTIC, MSOP-10 |
| 文件页数： | 46/47页 |
| 文件大小： | 1545K |
| 代理商： | PGA112AIDGSRG4 |
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PIN CONFIGURATIONS
1
2
3
4
5
10
9
8
7
6
DV
DD
CS
DIO
SCLK
GND
AV
DD
CH1
V
/CH0
CAL
V
REF
V
OUT
PGA112
PGA113
SBOS424B – MARCH 2008 – REVISED SEPTEMBER 2008 ............................................................................................................................................ www.ti.com
MSOP-10
DGS PACKAGE
(TOP VIEW)
PGA112, PGA113 TERMINAL FUNCTIONS
MSOP
PACKAGE
PIN #
NAME
DESCRIPTION
1
AVDD
Analog supply voltage (+2.2V to +5.5V)
2
CH1
Input MUX channel 1
Input MUX channel 0 and VCAL input. For system calibration purposes, connect this pin to a
low-impedance external reference voltage to use internal calibration channels. The four internal
3
VCAL/CH0
calibration channels are connected to GND, 0.9VCAL, 0.1VCAL, and VREF, respectively. VCAL is loaded
with 100k
(typical) when internal calibration channels CAL2 or CAL3 are selected. Otherwise,
VCAL/CH0 appears as high impedance.
Reference input pin. Connect external reference for VOUT offset shift or to midsupply for midsupply
4
VREF
referenced systems. VREF must be connected to a low-impedance reference capable of sourcing and
sinking at least 2mA or VREF must be connected to GND.
5
VOUT
Analog voltage output. When AVDD < DVDD, VOUT is clamped to AVDD + 300mV.
6
GND
Ground pin
7
SCLK
Clock input for SPI serial interface
8
DIO
Data input/output for SPI serial interface. DIO contains a weak, 10
A internal pull-down current source.
9
CS
Chip select line for SPI serial interface
Digital and op amp output stage supply voltage (+2.2V to +5.5V). Useful in multi-supply systems to
prevent overvoltage/lockup condition on an analog-to-digital (ADC) input (for example, a microcontroller
10
DVDD
with an ADC running on +3V and the PGA powered from +5V). Digital I/O levels to be relative to DVDD.
DVDD should be bypassed with a 0.1F ceramic capacitor, and DVDD must supply the current for the
digital portion of the PGA as well as the load current for the op amp output stage.
8
Copyright 2008, Texas Instruments Incorporated
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相关代理商/技术参数 |
参数描述 |
|---|---|
| PGA112AIDGST | 功能描述:特殊用途放大器 Sgl-Sply Sgl-Ended Prec Prgrm Gain Amp RoHS:否 制造商:Texas Instruments 通道数量:Single 共模抑制比（最小值）: 输入补偿电压: 工作电源电压:3 V to 5.5 V 电源电流:5 mA 最大功率耗散: 最大工作温度:+ 70 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:QFN-20 封装:Reel |
| PGA112AIDGSTG4 | 功能描述:特殊用途放大器 0-Drift Programmable Gain Amp RoHS:否 制造商:Texas Instruments 通道数量:Single 共模抑制比（最小值）: 输入补偿电压: 工作电源电压:3 V to 5.5 V 电源电流:5 mA 最大功率耗散: 最大工作温度:+ 70 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:QFN-20 封装:Reel |
| PGA112EVM | 功能描述:放大器 IC 开发工具 PGA112 Eval Mod RoHS:否 制造商:International Rectifier 产品:Demonstration Boards 类型:Power Amplifiers 工具用于评估:IR4302 工作电源电压:13 V to 23 V |
| PGA112EVM-B | 功能描述:放大器 IC 开发工具 PGA112 Eval Mod Rev B RoHS:否 制造商:International Rectifier 产品:Demonstration Boards 类型:Power Amplifiers 工具用于评估:IR4302 工作电源电压:13 V to 23 V |
| PGA113 | 制造商:TI 制造商全称:Texas Instruments 功能描述:Single-Supply, Single-Ended, Precision Programmable Gain Amplifier with MUX |
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