参数资料
| 型号： | PIC12F635-I/P |
| 厂商： | Microchip Technology |
| 文件页数： | 4/74页 |
| 文件大小： | 0K |
| 描述： | IC MCU FLASH 1KX14 8DIP |
| 产品培训模块： | Asynchronous Stimulus 8-bit PIC® Microcontroller Portfolio |
| 标准包装： | 60 |
| 系列： | PIC® 12F |
| 核心处理器： | PIC |
| 芯体尺寸： | 8-位 |
| 速度： | 20MHz |
| 外围设备： | 欠压检测/复位，POR，WDT |
| 输入/输出数： | 5 |
| 程序存储器容量： | 1.75KB（1K x 14） |
| 程序存储器类型： | 闪存 |
| EEPROM 大小： | 128 x 8 |
| RAM 容量： | 64 x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 2 V ~ 5.5 V |
| 振荡器型： | 内部 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-DIP（0.300"，7.62mm） |
| 包装： | 管件 |
| 产品目录页面： | 637 (CN2011-ZH PDF) |
| 配用： | DM163029-ND - BOARD PICDEM FOR MECHATRONICS AC162057-ND - MPLAB ICD 2 HEADER 14DIP ACICE0201-ND - MPLABICE 8P 300 MIL ADAPTER AC124001-ND - MODULE SKT PROMATEII 8DIP/SOIC |
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Micrel, Inc.
KSZ8841-PMQL
October 2007
12
M9999-100407-1.5
Pin
Number
Pin
Name
Type
Pin Function
during read/write operation.
72
STOPN
I/O
PCI Stop
This signal is asserted low by the target device to request the master device to stop the
current transaction.
73
IDSEL
I/O
PCI Initialization Device Select
This signal is used to select the KSZ8841-PMQL during configuration read and write
transactions. Active high.
74
DEVSELN
I/O
PCI Device Select
This signal is asserted low when it is selected as a target during a bus transaction. As a
bus master, the KSZ8841-PMQL samples this signal to insure that a PCI target
recognizes the destination address for the data transfer.
75
REQN
O
PCI Bus Request
The KSZ8841-PMQL will assert this signal low to request PCI bus master operation.
76
GNTN
I
PCI Bus Grant
This signal is asserted low to indicate to the KSZ8841-PMQL that it has been granted
the PCI bus master operation.
77
PERRN
I/O
PCI Parity Error
The KSZ8841-PMQL as a master or target will assert this signal low to indicate a parity
error on any incoming data. As a bus master, it will monitor this signal on all write
operations.
78
DGND
Gnd
Digital ground
79
VDDIO
P
3.3V digital I/O VDD
80
SERRN
O
PCI System Error
This system error signal is asserted low by the KSZ8841-PMQL. This signal is used to
report address parity errors.
81
NC
—
No connect
82
NC
—
No connect
83
NC
—
No connect
84
NC
—
No connect
85
CBE3N
I/O
86
CBE2N
I/O
87
CBE1N
I/O
88
CBE0N
I/O
Command and Byte Enable
These signals are multiplexed on the same PCI pins. During the address phase, these
lines define the bus command. During the data phase, these lines are used as Byte
Enables, The Byte enables are valid for the entire data phase and determine which byte
lanes carry meaningful data.
89
PAD31
I/O
PCI Address / Data 31
Address and data are multiplexed on the all of the PAD pins. The PAD pins carry the
physical address during the first clock cycle of a transaction, and carry data during the
subsequent clock cycles.
90
DGND
Gnd
Digital core ground
91
VDDC
P
1.2V digital core VDD
92
VDDIO
P
3.3V digital I/O VDD
93
PAD30
I/O
PCI Address / Data 30
94
PAD29
I/O
PCI Address / Data 29
95
PAD28
I/O
PCI Address / Data 28
96
PAD27
I/O
PCI Address / Data 27
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相关代理商/技术参数 |
参数描述 |
|---|---|
| PIC12F635-IS | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:8/14-Pin, Flash-Based 8-Bit CMOS Microcontrollers with nanoWatt Technology |
| PIC12F635TE/MF | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:8/14-PIN FLASH-BASED, 8-BIT CMOS MICROCONTROLLERS WITH NANOWATT TECHNOLOGY |
| PIC12F635TE/MFQTP | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:8/14-PIN FLASH-BASED, 8-BIT CMOS MICROCONTROLLERS WITH NANOWATT TECHNOLOGY |
| PIC12F635TE/P | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:8/14-PIN FLASH-BASED, 8-BIT CMOS MICROCONTROLLERS WITH NANOWATT TECHNOLOGY |
| PIC12F635TE/PQTP | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:8/14-PIN FLASH-BASED, 8-BIT CMOS MICROCONTROLLERS WITH NANOWATT TECHNOLOGY |
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