参数资料
| 型号： | PIC12F635T-I/MF |
| 厂商： | Microchip Technology |
| 文件页数： | 6/74页 |
| 文件大小： | 0K |
| 描述： | IC MCU FLASH 1KX14 8DFN |
| 标准包装： | 3,300 |
| 系列： | PIC® 12F |
| 核心处理器： | PIC |
| 芯体尺寸： | 8-位 |
| 速度： | 20MHz |
| 外围设备： | 欠压检测/复位，POR，WDT |
| 输入/输出数： | 5 |
| 程序存储器容量： | 1.75KB（1K x 14） |
| 程序存储器类型： | 闪存 |
| EEPROM 大小： | 128 x 8 |
| RAM 容量： | 64 x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 2 V ~ 5.5 V |
| 振荡器型： | 内部 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-VDFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
| 配用： | AC164324-ND - MODULE SKT FOR MPLAB 8DFN/16QFN XLT08DFN2-ND - SOCKET TRANSITION ICE 14DIP/8DFN AC162057-ND - MPLAB ICD 2 HEADER 14DIP XLT08DFN-ND - SOCKET TRANSITION ICE 8DFN AC164032-ND - ADAPTER PICSTART PLUS 8DFN/DIP AC124001-ND - MODULE SKT PROMATEII 8DIP/SOIC |
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Micrel, Inc.
KSZ8841-PMQL
October 2007
14
M9999-100407-1.5
Functional Description
The KSZ8841-PMQL is a single chip Fast Ethernet MAC controller consisting of a 10/100 physical layer transceiver
(PHY), a MAC, and a PCI interface unit that controls the KSZ8841-PMQL via a 32 bit/33MHz PCI processor interface.
The KSZ8841-PMQL is fully compliant to the IEEE802.3u standard.
PCI Bus Interface Unit
PCI Bus Interface
The PCI Bus Interface implements PCI v2.2 bus protocols and configuration space. The KSZ8841-PMQL supports bus
master reads and writes to CPU memory, and CPU access to on-chip register space. When the CPU reads and writes
the configuration registers of the KSZ8841-PMQL, it is as a slave. So the KSZ8841-PMQL can be either a PCI bus
master or slave. The PCI Bus Interface is also responsible for managing the DMA interfaces and the host processors
access. Arbitration logic within the PCI Bus Interface unit accepts bus requests from the TXDMA logic and RXDMA
logic.
The PCI bus interface also manages interrupt generation for a host processor.
TXDMA Logic and TX Buffer Manager
The KSZ8841-PMQL supports a multi-frame, multi-fragment DMA gather process. Descriptors representing frames are
built and linked in system memory by a host processor. The TXDMA logic is responsible for transferring the multi-
fragment frame data from the host memory into the TX buffer.
The KSZ8841-PMQL uses 4K bytes of transmit data buffer between the TXDMA logic and transmit MAC. When the
TXDMA logic determines there is enough space available in the TX buffer, the TXDMA logic will move any pending
frame data into the TX buffer. The management mechanism depends on the transmit descriptor list.
RXDMA Logic and RX Buffer Manager
The KSZ8841-PMQL supports a multi-frame, multi-fragment DMA scatter process. Descriptors representing frames are
built and linked in system memory by the host processor. The RXDMA logic is responsible for transferring the frame
data from the RX buffer to the host memory.
The KSZ8841-PMQL uses 4K bytes of receive data buffer between the receive MAC and RXDMA logic. The
management mechanism depends on the receive descriptor list.
Power Management
Power down
The KSZ8841-PMQL features a port power-down mode. To save power, the user can power-down this port that is not
in use by setting bit 11 in either P1CR4 or P1MBCR register for this port. To bring the port back up, reset bit 11 in these
registers.
In addition, there is a full chip power-down mode by pulled-down the PWRDN pin 36. When this pin is pulled-down, the
entire chip powers down. Transitioning this pin from pull-down to pull-up results in a power up and chip reset.
Wake-on-LAN
Wake-up frame events are used to wake the system whenever meaningful data is presented to the system over the
network. Examples of meaningful data include the reception of a Magic Packet, a management request from a remote
administrator, or simply network traffic directly targeted to the local system. In all of these instances, the network device
is pre-programmed by the policy owner or other software with information on how to identify wake frames from other
network traffic.
A wake-up event is a request for hardware and/or software external to the network device to put the system into a
powered state (working).
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| PIC12F636 | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:8/14-PIN FLASH-BASED, 8-BIT CMOS MICROCONTROLLERS WITH NANOWATT TECHNOLOGY |
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