参数资料
型号: PIC16LC556-04/SS
元件分类: 微控制器/微处理器
英文描述: 8-BIT, OTPROM, 4 MHz, RISC MICROCONTROLLER, PDSO20
封装: 0.209 INCH, PLASTIC, SSOP-20
文件页数: 102/104页
文件大小: 697K
代理商: PIC16LC556-04/SS
1996 Microchip Technology Inc.
Preliminary
DS40143A-page 97
PIC16C55X
List of Examples
Example 3-1:
Instruction Pipeline Flow ........................... 10
Example 4-1:
Indirect Addressing ................................... 20
Example 5-1:
Read-Modify-Write Instructions
on an I/O Port............................................ 25
Example 6-1:
Changing Prescaler (Timer0
→WDT) ........ 31
Example 6-2:
Changing Prescaler (WDT
→Timer0) ........ 31
Example 7-1:
Saving the Status and W Registers
in RAM ...................................................... 45
List of Figures
Figure 3-1:
Block Diagram............................................. 8
Figure 3-2:
Clock/Instruction Cycle.............................. 10
Figure 4-1:
Program Memory Map and Stack for the
PIC16C554................................................ 11
Figure 4-2:
Program Memory Map and Stack for the
PIC16C556................................................ 11
Figure 4-3:
Program Memory Map and Stack for the
PIC16C558................................................ 11
Figure 4-4:
Data Memory Map for the
PIC16C554/556......................................... 13
Figure 4-5:
Data Memory Map for the PIC16C558...... 13
Figure 4-6:
STATUS Register (Address 03h or 83h)... 15
Figure 4-7:
OPTION Register (Address 81h) .............. 16
Figure 4-8:
INTCON Register (Address 0Bh or 8Bh) .. 17
Figure 4-9:
PCON Register (Address 8Eh) ................. 18
Figure 4-10:
Loading Of PC In Different Situations ....... 19
Figure 4-11:
Direct/Indirect Addressing PIC16C55X ..... 20
Figure 5-1:
Block Diagram of RA<3:0>........................ 21
Figure 5-2:
Block Diagram of RA4 Pin......................... 21
Figure 5-3:
Block Diagram of RB7:RB4 Pins............... 23
Figure 5-4:
Block Diagram of RB3:RB0 Pins............... 23
Figure 5-5:
Successive I/O Operation ......................... 25
Figure 6-1:
TIMER0 Block Diagram............................. 27
Figure 6-2:
TIMER0 (TMR0) Timing: Internal
Clock/No Prescaler ................................... 27
Figure 6-3:
TIMER0 Timing: Internal
Clock/Prescale 1:2 .................................... 28
Figure 6-4:
TIMER0 Interrupt Timing........................... 28
Figure 6-5:
TIMER0 Timing With External Clock......... 29
Figure 6-6:
Block Diagram of the Timer0/WDT
Prescaler ................................................... 30
Figure 7-1:
Configuration Word ................................... 34
Figure 7-2:
Crystal Operation (or Ceramic Resonator)
(HS, XT or LP Osc Configuration)............. 35
Figure 7-3:
External Clock Input Operation
(HS, XT or LP Osc Configuration)............. 35
Figure 7-4:
External Parallel Resonant Crystal
Oscillator Circuit ........................................ 36
Figure 7-5:
External Series Resonant Crystal
Oscillator Circuit ........................................ 36
Figure 7-6:
RC Oscillator Mode ................................... 36
Figure 7-7:
Simplified Block Diagram of On-chip
Reset Circuit.............................................. 37
Figure 7-8:
Time-out Sequence on Power-up
(MCLR not tied to VDD): Case 1................ 41
Figure 7-9:
Time-out Sequence on Power-up
(MCLR not tied to VDD): Case 2................ 41
Figure 7-10:
Time-out Sequence on Power-up
(MCLR tied to VDD) ................................... 41
Figure 7-11:
External Power-on Reset Circuit
(For Slow VDD Power-up).......................... 42
Figure 7-12:
Interrupt Logic ........................................... 43
Figure 7-13:
INT Pin Interrupt Timing ............................ 44
Figure 7-14:
Watchdog Timer Block Diagram ................46
Figure 7-15:
Summary of Watchdog Timer Registers....46
Figure 7-16:
Wake-up from Sleep Through Interrupt .....47
Figure 7-17:
Typical In-Circuit Serial Programming
Connection.................................................48
Figure 8-1:
General Format for Instructions .................49
Figure 9-1:
PICMASTER System Configuration ..........61
Figure 10-1:
Load Conditions.........................................72
Figure 10-2:
External Clock Timing................................73
Figure 10-3:
CLKOUT and I/O Timing............................74
Figure 10-4:
Reset, Watchdog Timer, Oscillator
Start-Up Timer and Power-Up Timer
Timing ........................................................75
Figure 10-5:
TIMER0 Clock Timing................................76
Figure 10-6:
Load Conditions.........................................76
List of Tables
Table 1-1:
PIC16C55X Family of Devices ....................4
Table 3-1:
PIC16C55X Pinout Description....................9
Table 4-1:
Special Registers for the PIC16C55X........14
Table 5-1:
PORTA Functions......................................22
Table 5-2:
Summary of Registers Associated with
PORTA ......................................................22
Table 5-3:
PORTB Functions......................................24
Table 5-4:
Summary of Registers Associated with
PORTB ......................................................24
Table 6-1:
Registers Associated with Timer0 .............31
Table 7-1:
Capacitor Selection for Ceramic
Resonators (Preliminary) ...........................35
Table 7-2:
Capacitor Selection for Crystal
Oscillator (Preliminary) ..............................35
Table 7-3:
Time-out in Various Situations...................39
Table 7-4:
Status Bits and Their Significance .............39
Table 7-5:
Initialization Condition for Special
Registers....................................................40
Table 7-6:
Initialization Condition for Registers ..........40
Table 8-1:
OPCODE Field Descriptions......................49
Table 8-2:
PIC16C55X Instruction Set........................50
Table 9-1:
PICMASTER System Configuration ..........62
Table 9-2:
Development System Packages................65
Table 10-1:
Cross Reference of Device Specs for
Oscillator Configurations and Frequencies
of Operation (Commercial Devices)...........67
Table 10-2:
External Clock Timing Requirements ........73
Table 10-3:
CLKOUT and I/O Timing Requirements ....74
Table 10-4:
Reset, Watchdog Timer, Oscillator
Start-up Timer and Power-up Timer
Requirements ............................................75
Table 10-5:
TIMER0 Clock Requirements ....................76
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