参数资料
型号: PIC18F46J50-I/PT
厂商: Microchip Technology
文件页数: 130/164页
文件大小: 0K
描述: IC PIC MCU FLASH 64KB 44-TQFP
产品培训模块: XLP Deep Sleep Mode
PIC18 J Series MCU Overview
PIC18F MPLAB® Starter Kit
8-bit PIC® Microcontroller Portfolio
标准包装: 160
系列: PIC® XLP™ 18F
核心处理器: PIC
芯体尺寸: 8-位
速度: 48MHz
连通性: I²C,SPI,UART/USART,USB
外围设备: 欠压检测/复位,DMA,POR,PWM,WDT
输入/输出数: 34
程序存储器容量: 64KB(32K x 16)
程序存储器类型: 闪存
RAM 容量: 3.8K x 8
电压 - 电源 (Vcc/Vdd): 2.15 V ~ 3.6 V
数据转换器: A/D 13x10b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 44-TQFP
包装: 托盘
产品目录页面: 657 (CN2011-ZH PDF)
配用: AC164330-ND - MODULE SKT FOR 44TQFP 18F45J10
PIC18F46J50 FAMILY
DS39931D-page 68
2011 Microchip Technology Inc.
5.7
Reset State of Registers
Most registers are unaffected by a Reset. Their status
is unknown on POR and unchanged by all other
Resets. The other registers are forced to a “Reset
state” depending on the type of Reset that occurred.
Most registers are not affected by a WDT wake-up,
since this is viewed as the resumption of normal
operation. Status bits from the RCON register (CM, RI,
TO, PD, POR and BOR) are set or cleared differently in
different Reset situations, as indicated in Table 5-1.
These bits are used in software to determine the nature
of the Reset.
Table 5-2 describes the Reset states for all of the
Special Function Registers. These are categorized by
POR and BOR, MCLR and WDT Resets and WDT
wake-ups.
TABLE 5-1:
STATUS BITS, THEIR SIGNIFICANCE AND THE INITIALIZATION CONDITION FOR
RCON REGISTER
Condition
Program
Counter(1)
RCON Register
STKPTR Register
CM
RI
TO
PD
POR
BOR
STKFUL STKUNF
Power-on Reset
0000h
111100
0
RESET
instruction
0000h
u0uuuu
u
Brown-out Reset
0000h
1111u0
u
Configuration Mismatch Reset
0000h
0uuuuu
u
MCLR Reset during
power-managed Run modes
0000h
uu1uuu
u
MCLR Reset during
power-managed Idle modes and
Sleep mode
0000h
uu10uu
u
MCLR Reset during full-power
execution
0000h
uuuuuu
u
Stack Full Reset (STVREN = 1)
0000h
uuuuuu
1
u
Stack Underflow Reset
(STVREN = 1)
0000h
uuuuuu
u
1
Stack Underflow Error (not an
actual Reset, STVREN = 0)
0000h
uuuuuu
u
1
WDT time-out during full-power
or power-managed Run modes
0000h
uu0uuu
u
WDT time-out during
power-managed Idle or Sleep
modes
PC + 2
uu00uu
u
Interrupt exit from
power-managed modes
PC + 2
uuu0uu
u
Legend: u
= unchanged
Note 1:
When the wake-up is due to an interrupt and the GIEH or GIEL bit is set, the PC is loaded with the
interrupt vector (0008h or 0018h).
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