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参数资料
| 型号： | PM49FL004T-33VCE |
| 厂商： | PMC-Sierra, Inc. |
| 英文描述： | 2 Mbit / 4 Mbit 3.3 Volt-only Firmware Hub/LPC Flash Memory |
| 中文描述： | 2兆位/ 4兆位3.3伏，只固件集线器/ LPC快闪记忆体 |
| 文件页数： | 6/46页 |
| 文件大小： | 208K |
| 代理商： | PM49FL004T-33VCE |
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Programmable Microelectronics Corp.
Issue Date: December, 2003 Rev: 1.4
6
PMC
Pm49FL002 / 004
DEVICE OPERATION
MODE SELECTION
The Pm49FL002/004 can operate in two configurable
interfaces: The In-System Hardware interface and Ad-
dress/Address Multiplexed (A/A Mux) interface con-
trolled by IC pin. If the IC pin is set to logic high (V
IH
),
the devices enter into A/A Mux interface mode. If the IC
pin is set logic low (V
IL
), the devices will be in in-system
hardware interface mode. During the in-system hard-
ware interface mode, the devices can automatically de-
tect the Firmware Hub (FWH) or Low Pin Count (LPC)
memory cycle sent from host system and response to
the command accordingly. The IC pin must be setup
during power-up or system reset, and stays no change
during device operation.
When working in-system, typically on a PC or Note-
book, the Pm49FL002/004 are connected to the host
system through a 5-pin communication interface oper-
ated based on a 33-MHz synchronous clock. The 5-pin
interface is defined as FWH[3:0] and FWH4 pins under
FWH mode or as LAD[3:0] and LFRAME# pins under
LPC mode for easy understanding as to those existing
compatible products. When working off-system, typi-
cally on a EPROM Programmer, the devices are oper-
ated through 11-pin multiplexed address - A[10:0] and
8-pin data I/O - I/O[7:0] interfaces. The memory ad-
dresses of devices are input through two bus cycles as
row and column addresses controlled by a R/C# pin.
BLOCK DIAGRAM
WE#
OE#
R/C#
IC
PP MODE
INTERFACE
CONTROL
LOGIC
A[10:0]
ERASE/PROGRAM
VOLTAGE
GENERATOR
HIGH VOLTAGE
SWITCH
I/O[7:0]
I/O BUFFERS
DATA
LATCH
SENSE
AMP
Y-GATING
MEMORY
ARRAY
L
Y-DECODER
X-DECODER
FWH/LPC
MODE
INTERFACE
FWH[3:0] or
LAD[3:0]
FWH4 or LFRAME#
CLK
GPI[4:0]
WP#
TBL#
INIT#
RST#
n
o
p
c
s
e
D
s
s
e
r
d
d
A
a
D
D
I
a
n
a
M
h
h
0
2
0
0
0
0
0
0
0
0
h
h
D
F
9
7
D
I
9
4
9
4
e
m
m
c
e
P
P
D
2
4
0
0
0
0
L
L
F
F
b
b
M
M
2
4
h
1
0
0
0
0
h
h
D
E
6
6
Table 1: Product Identification
PRODUCT IDENTIFICATION
The product identification mode can be used to read the
Manufacturer ID and the Device ID by a software Prod-
uct ID Entry command in both in-system hardware in-
terface and A/A Mux interface modes. The product
indentification mode is activated by three-bus-cycle com-
mand. Refer to Table 1 for the Manufacturer ID and De-
vice ID of Pm49FL00x and Table 14 for the SDP Com-
mand Definition.
In FWH mode, the product identification can also be
read directly at FFBC0000h for Manufacturer ID -
“
9Dh
”
and FFBC0001h for Device ID in the 4 GByte system
memory map.
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