S/UNI-ATLAS-3200 Telecom Standard Product Data Sheet
Preliminary
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1990553, Issue 4
405
TxPhy POS-PHY Logical Timing
The S/UNI-ATLAS-3200 input interface in the egress direction acts as a Tx PHY layer device.
This interface is controlled by the attached Link Layer device using the TPP_TENB signal.
Figure 34 is an example of polling and transmission to a multi-port PHY device with several
channels. The S/UNI-ATLAS-3200 indicates that a FIFO has at least 16 32-bit words or more of
space available by asserting TPP_PTPA when it is polled by the link layer. Polling is
accomplished with the TPP_ADDR[5:0] signal. After selection, packet available status is
indicated by asserting the selected transmit packet available signal TPP_STPA. TPP_STPA
remains asserted while the PHY is selected and until the transmit FIFO is almost full. When
TPP_STPA transitions low, it indicates that there are less than 16 32-bit words available in the
Transmit FIFO. The latency on this signal is no more than 8 cycles. If STPA is being used, the
source must take this latency into account in using STPA to avoid overflow. The use of STPA is
optional; the source may safely rely solely on PTPA
Figure 34 TxPhy POS-PHY Packet Transfer
1
2
3
4
5
6
7
8
9
10
11
12
13
0000
D0
D47
D48
D49
D50
0001
D16
.......
......
D1
D2
......
P1
P1
P2
P4
P0
P1
P4
P0
P2
P4
P0
P2
P4
P4
P2
P1
P0
......
0
0
0
1
0
....
....
....
P0
P1
......
TPP_CLK
TPP_SX
TPP_SOP
TPP_EOP
TPP_ERR
TPP_ENB
TPP_DAT[31:0]
TPP_MOD[1:0]
TPP_PAR
TPP_STPA
TPP_ADDR[5:0]
TPP_PTPA
Figure 35 is an example of the Link Layer device polling and sending ATM cells across the POS
interface to the S/UNI-ATLAS-3200 Transmit PHY interface. The Link Layer device is not
restricted in its polling order. Cells and packets may be interleaved, but they must belong to
separate FIFOs.