
RELEASED
DATA SHEET
PM7382 FREEDM-32P256
ISSUE 3
PMC-2010333
FRAME ENGINE AND DATA LINK MANAGER 32P256
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
229
Register 0x404 : TCAS Indirect Channel Data
Bit
Type
Function
Default
Bit 31
to
Bit 16
Unused
XXXXH
Bit 15
R/W
PROV
0
Bit 14
to
Bit 10
Unused
XXH
Bit 9
R/W
Reserved
0
Bit 8
R/W
Reserved
0
Bit 7
R/W
CHAN[7]
0
Bit 6
R/W
CHAN[6]
0
Bit 5
R/W
CHAN[5]
0
Bit 4
R/W
CHAN[4]
0
Bit 3
R/W
CHAN[3]
0
Bit 2
R/W
CHAN[2]
0
Bit 1
R/W
CHAN[1]
0
Bit 0
R/W
CHAN[0]
0
This register contains the data read from the transmit channel provision RAM
after an indirect read operation or the data to be inserted into the transmit
channel provision RAM in an indirect write operation.
Note
This register is not byte addressable. Writing to this register modifies all the bits
in the register. Byte selection using byte enable signals (CBEB[3:0]) are not
implemented. However, when all four byte enables are negated, no access is
made to this register.
CHAN[7:0]:
The indirect data bits (CHAN[7:0]) report the channel number read from the
transmit channel provision RAM after an indirect read operation has
completed. Channel number to be written to the transmit channel provision
RAM in an indirect write operation must be set up in this register before