参数资料
型号: PS200-I/SS
元件分类: 电源管理
英文描述: 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO20
封装: 5.30 MM, PLASTIC, MO-150, SSOP-20
文件页数: 10/36页
文件大小: 537K
代理商: PS200-I/SS
PS200
DS21891B-page 16
2005 Microchip Technology Inc.
5.3
DC Characteristics
5.4
Shunt Regulator
TABLE 5-1:
SHUNT REGULATOR SPECIFICATIONS
DC CHARACTERISTICS
Standard Operating Conditions (unless otherwise stated)
Operating temperature
-40°C to +85°C
Param
No.
Sym
Characteristic
Min
Typ
Max
Units
Conditions
D001B
D001C
VDD
Supply Voltage
2.0
4.5
5.0
V
FOSC <= 4 MHz
FOSC > 4 MHz
D002
VDR
RAM Data Retention Voltage(1)
1.5*
V
Device in Sleep mode
D003
VPOR
VDD Start Voltage to ensure
internal Power-on Reset signal
—VSS
V
See section on Power-on Reset
for details
D004
SVDD
VDD Rise Rate to ensure internal
Power-on Reset signal
0.05*
V/ms See section on Power-on Reset
for details
D005
VBOR
VDD Voltage required to initiate a
Brown-out Detect
—2.1
V
D010S
IDD
Supply Current(2)
——
mA
VDD and current are constant due
to shunt regulator.
D020
IPD
Power-Down Current(3)
—2.9
TBD
nA
VDD = 5.0V, WDT disabled
Legend: TBD = To Be Determined
*
These parameters are characterized but not tested.
Data in “Typ” column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested
Note 1:
This is the limit to which VDD can be lowered in Sleep mode without losing RAM data.
2:
The test conditions for all IDD measurements in active operation mode are: OSC1 = external square wave,
from rail to rail; all I/O pins tri-stated, pulled to VDD; RESET = VDD.
3:
The power-down current in Sleep mode does not depend on the oscillator type. Power-down current is
measured with the part in Sleep mode, with all I/O pins in high-impedance state and tied to VDD and VSS.
Shunt Regulator Specifications
Standard Operating Conditions (unless otherwise stated)
Operating temperature -40°C to +125°C
Characteristic
Sym
Min
Typ
Max
Units
Comments
Shunt Voltage
VSHUNT
4.75
5.25
Volts
Shunt Current
ISHUNT
4—
50
mA
Shunt Resistance
RSHUNT
——
3
Ω
Settling Time*
TSETTLE
150
ns
To 1% of final value
Load Capacitance
CLOAD
0.01
10
μF
Bypass capacitor on
VDD pin
Regulator Operating Current
ΔISNT
—180
μA
Includes band gap
reference current
*
These parameters are characterized but not tested.
Note:
The
Δ current is the additional current consumed when this peripheral is enabled. This current should be
added to the base IDD or IPD measurement.
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