2005 Microchip Technology Inc.
DS21891B-page 15
PS200
5.0
ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings
Ambient temperature under bias................................................................................................................. -40 to +125°C
Storage temperature .............................................................................................................................. -65°C to +150°C
Voltage on VDD with respect to VSS ............................................................................................................ -0.3 to +6.5V
Voltage on RESET with respect to Vss ......................................................................................................-0.3 to +13.5V
Voltage on HVOUT with respect to Vss ........................................................................................................... 0V to +8.5V
Voltage on all other pins with respect to VSS ................................................................................. -0.3V to (VDD + 0.3V)
Total power dissipation(1) ..................................................................................................................................... 800 mW
Maximum current out of VSS pin ........................................................................................................................... 300 mA
Maximum current into VDD pin .............................................................................................................................. 250 mA
Input clamp current, IIK (VI < 0 or VI > VDD)
...................................................................................................................... ±20 mA
Output clamp current, IOK (Vo < 0 or Vo >VDD)
................................................................................................................ ±20 mA
Maximum output current sunk by any I/O pin...................................................................................................... 25 mA(2)
Maximum output current sourced by each Port .................................................................................................. 50 mA(2)
Note 1: Power dissipation is calculated as follows: PDIS = VDD x {IDD –
∑ IOH} + ∑ {(VDD – VOH) x IOH} + ∑(VOL x IOL).
2: Total source current must not exceed the shunt regulator capacity.
5.1
Reliability Targets
5.2
Design Targets
NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at those or any other conditions above
those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for
extended periods may affect device reliability.
The device must be designed to target the following reliability specifications:
ESD:
±4000V HBM
±400V MM
all pins including VDD, VSS, RESET
Latch-up: ±400 mA @ 125°C
The AC/DC specifications included in the following sections are preliminary specifications that we intend to publish
at product introduction. As the product matures, we intend to expand the specifications. Therefore, design should
try and meet the following extended VDD/temperature targets:
1.
Frequency of operation: DC – 4 MHz, VDD = 2.0V – 5.5V, -40°C to 125°C
2.
Frequency of operation: DC – 20 MHz, VDD = 4.5V – 5.5V, -40°C to 125°C