参数资料
| 型号： | PS700T-I/ST |
| 厂商： | Microchip Technology |
| 文件页数： | 29/38页 |
| 文件大小： | 0K |
| 描述： | IC BATT MONITOR 1-2CELL 8TSSOP |
| 标准包装： | 1 |
| 功能： | 电池监控器 |
| 电池化学： | 锂离子（Li-Ion） |
| 电源电压： | 2.7 V ~ 9 V |
| 工作温度： | -20°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 8-TSSOP |
| 包装： | 剪切带 (CT) |
| 其它名称： | PS700T-I/STCT |
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PS700
5.0
CAL/SETUP MODE AND
After each address is sent, the PS700 will NACK the
REGISTERS
Cal/Setup mode allows the designer to reprogram the
default SMBus address and/or change the calibration
parameters programmed at the factory for band gap,
voltage reference and main oscillator trim values.
Entering Cal/Setup mode requires the host to request
three consecutive and specific incorrect SMBus
addresses with no interruptions between requests.
These addresses are:
Addr1 HEX 50
Addr2 HEX 52
Addr3 HEX 74
address. Once the sequence is complete, the PS700
will enter Cal/Setup mode and allow access to the
Cal/Setup registers located in memory Bank 2.
To exit Cal/Setup mode, re-enter the same address
sequence or power-down the part. The PS700 will
always power-up with Cal/Setup mode disabled.
The following registers are only available in Cal/Setup
mode.
5.1
Cal/Setup Mode Registers
REGISTER 5-1:
SMBAdd: SMBus ADDRESS REGISTERS (ADDRESS 80 HEX/128 DECIMAL)
bit 7
SMBAdd
Reserved
bit 0
bit 7-1
bit 0
SMBAdd: SMBus Address Register bits
The value placed in bits <7:1> of this register defines the SMBus address for this device.
Reserved: Reserved bit location
Legend:
‘1’ = Bit is set
‘0’ = Bit is cleared
R = Reserved bit
REGISTER 5-2:
V BGT : BAND GAP TRIM REGISTER (ADDRESS 81 HEX/129 DECIMAL)
bit 7
Reserved
V BGT
bit 0
bit 7-4
bit 3-0
Reserved: Reserved bit location
V BGT : Band Gap Voltage Trim bits
This value is set by the factory.
Legend:
‘1’ = Bit is set
? 2004 Microchip Technology Inc.
‘0’ = Bit is cleared
R = Reserved bit
DS21760F-page 29
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