参数资料
型号: PSD4235F1-C-90MI
厂商: 意法半导体
英文描述: Flash In-System-Programmable Peripherals for 16-Bit MCUs
中文描述: Flash在系统可编程外设的16位微控制器
文件页数: 49/93页
文件大小: 503K
代理商: PSD4235F1-C-90MI
PSD4000 Series
Preliminary Information
46
The
PSD4000
Functional
Blocks
(cont.)
9.4 I/OPorts
There are seven programmable I/O ports: Ports A, B, C, D, E, F and G. Each of the ports
is eight bits except Port D, which is 4 bits. Each port pin is individually user configurable,
thus allowing multiple functions per port. The ports are configured using PSDsoft or by the
microcontroller writing to on-chip registers in the CSIOP address space.
The topics discussed in this section are:
General Port Architecture
Port Operating Modes
Port Configuration Registers
Port Data Registers
Individual Port Functionality.
9.4.1 General Port Architecture
The general architecture of the I/O Port is shown in Figure 20. Individual Port architectures
are shown in Figures 21 through 23. In general, once the purpose for a port pin has been
defined, that pin will no longer be available for other purposes. Exceptions will be noted.
As shown in Figure 20, the ports contain an output multiplexer whose selects are driven
by the configuration bits in the Control Registers (Ports E, F and G only) and PSDsoft
Configuration. Inputs to the multiplexer include the following:
J
Output data from the Data Out Register
J
Latched address outputs
J
GPLD outputs (External Chip Selects)
The Port Data Buffer (PDB) is a tri-state buffer that allows only one source at a time to be
read. The PDB is connected to the Internal Data Bus for feedback and can be read by the
microcontroller. The Data Out and Micro
Cell outputs, Direction and Control Registers,
and port pin input are all connected to the PDB.
The contents of these registers can be altered by the microcontroller. The PDB feedback
path allows the microcontroller to check the contents of the registers.
9.4.2 Port Operating Modes
The I/O Ports have several modes of operation. Some modes can be defined using
PSDsoft, some by the microcontroller writing to the Registers in CSIOP space, and some
by both. The modes that can only be defined using PSDsoft must be programmed into the
device and cannot be changed unless the device is reprogrammed. The modes that can be
changed by the microcontroller can be done so dynamically at run-time. The PLD I/O,
Data Port, Address Input, and MCU Reset modes are the only modes that must be defined
before programming the device. All other modes can be changed by the microcontroller at
run-time.
Table 16 summarizes which modes are available on each port. Table 19 shows how and
where the different modes are configured. Each of the port operating modes are described
in the following subsections.
相关PDF资料
PDF描述
PSD4235F1-C-90U Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4235F1-C-90UI Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4235F2-15UI Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4235F2-70UI Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4235F2-90B81 Flash In-System-Programmable Peripherals for 16-Bit MCUs
相关代理商/技术参数
参数描述
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PSD4235G2-90UI 功能描述:CPLD - 复杂可编程逻辑器件 5.0V 4M 90ns RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100
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