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| 型号： | PSD813F4-15JI |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 128K X 8 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQCC52 |
| 封装： | PLASTIC, LCC-52 |
| 文件页数： | 28/103页 |
| 文件大小： | 1180K |
| 代理商： | PSD813F4-15JI |
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PSD8XXF2/3/4/5
30/103
PLDS
The PLDs bring programmable logic functionality
to the PSD8XXFX. After specifying the logic for the
PLDs using the PSDabel tool in PSDsoft Express,
the logic is programmed into the device and avail-
able upon Power-up.
The PSD8XXFX contains two PLDs: the Decode
PLD (DPLD), and the Complex PLD (CPLD). The
PLDs are briefly discussed in the next few para-
graphs, and in more detail in the section entitled
“Decode PLD (DPLD)”, on page 32, and the sec-
tion entitled “Complex PLD (CPLD)”, also on page
The DPLD performs address decoding for Select
signals for internal components, such as memory,
registers, and I/O ports.
The CPLD can be used for logic functions, such as
loadable counters and shift registers, state ma-
chines, and encoding and decoding logic. These
logic functions can be constructed using the 16
Output Macrocells (OMC), 24 Input Macrocells
(IMC), and the AND Array. The CPLD can also be
used to generate External Chip Select (ECS0-
ECS2) signals.
The AND Array is used to form product terms.
These product terms are specified using PSDabel.
An Input Bus consisting of 73 signals is connected
to the PLDs. The signals are shown in Table 13.
The Turbo Bit in PSD8XXFX
The PLDs in the PSD8XXFX can minimize power
consumption by switching off when inputs remain
unchanged for an extended time of about 70ns.
Resetting the Turbo bit to 0 (Bit 3 of PMMR0) au-
tomatically places the PLDs into standby if no in-
puts are changing. Turning the Turbo mode off
increases propagation delays while reducing pow-
er consumption. See the section entitled “POWER
MANAGEMENT”, on page 58, on how to set the
Turbo bit.
Additionally, five bits are available in PMMR2 to
block MCU control signals from entering the PLDs.
This reduces power consumption and can be used
only when these MCU control signals are not used
in PLD logic equations.
Each of the two PLDs has unique characteristics
suited for its applications. They are described in
the following sections.
Table 13. DPLD and CPLD Inputs
Note: 1. The address inputs are A19-A4 in 80C51XA mode.
Input Source
Input Name
Number
of
Signals
MCU Address Bus1
A15-A0
16
MCU Control Signals
CNTL2-CNTL0
3
Reset
RST
1
Power-down
PDN
1
Port A Input
Macrocells
PA7-PA0
8
Port B Input
Macrocells
PB7-PB0
8
Port C Input
Macrocells
PC7-PC0
8
Port D Inputs
PD2-PD0
3
Page Register
PGR7-PGR0
8
Macrocell AB
Feedback
MCELLAB.FB7-
FB0
8
Macrocell BC
Feedback
MCELLBC.FB7-
FB0
8
Secondary Flash
memory Program
Status Bit
Ready/Busy
1
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相关代理商/技术参数 |
参数描述 |
|---|---|
| PSD813F4A-90J | 功能描述:SPLD - 简单可编程逻辑器件 U 511-PSD813F2A-90J RoHS:否 制造商:Texas Instruments 逻辑系列:TICPAL22V10Z 大电池数量:10 最大工作频率:66 MHz 延迟时间:25 ns 工作电源电压:4.75 V to 5.25 V 电源电流:100 uA 最大工作温度:+ 75 C 最小工作温度:0 C 安装风格:Through Hole 封装 / 箱体:DIP-24 |
| PSD813F4A-90M | 功能描述:SPLD - 简单可编程逻辑器件 U 511-PSD813F2A-90M RoHS:否 制造商:Texas Instruments 逻辑系列:TICPAL22V10Z 大电池数量:10 最大工作频率:66 MHz 延迟时间:25 ns 工作电源电压:4.75 V to 5.25 V 电源电流:100 uA 最大工作温度:+ 75 C 最小工作温度:0 C 安装风格:Through Hole 封装 / 箱体:DIP-24 |
| PSD813F4VA-15J | 功能描述:SPLD - 简单可编程逻辑器件 U 511-PSD813F2VA-15J RoHS:否 制造商:Texas Instruments 逻辑系列:TICPAL22V10Z 大电池数量:10 最大工作频率:66 MHz 延迟时间:25 ns 工作电源电压:4.75 V to 5.25 V 电源电流:100 uA 最大工作温度:+ 75 C 最小工作温度:0 C 安装风格:Through Hole 封装 / 箱体:DIP-24 |
| PSD813F4VA-15U | 功能描述:SPLD - 简单可编程逻辑器件 U 511-PSD813F2VA-15U RoHS:否 制造商:Texas Instruments 逻辑系列:TICPAL22V10Z 大电池数量:10 最大工作频率:66 MHz 延迟时间:25 ns 工作电源电压:4.75 V to 5.25 V 电源电流:100 uA 最大工作温度:+ 75 C 最小工作温度:0 C 安装风格:Through Hole 封装 / 箱体:DIP-24 |
| PSD813F5-12JI | 制造商:WSI 功能描述: |
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