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参数资料
| 型号： | PSD813F4-15JI |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 128K X 8 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQCC52 |
| 封装： | PLASTIC, LCC-52 |
| 文件页数： | 7/103页 |
| 文件大小： | 1180K |
| 代理商： | PSD813F4-15JI |
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PSD8XXF2/3/4/5
PSD8XXFX ARCHITECTURAL OVERVIEW
PSD8XXFX devices contain several major func-
tional blocks. Figure 3 shows the architecture of
the PSD8XXFX device family. The functions of
each block are described briefly in the following
sections. Many of the blocks perform multiple
functions and are user configurable.
Memory
Each of the memory blocks is briefly discussed in
the following paragraphs. A more detailed discus-
sion can be found in the section entitled “MEMO-
The 1 Mbit or 2 Mbit (128K x 8, or 256K x 8) Flash
memory is the primary memory of the PSD8XXFX.
It is divided into 8 equally-sized sectors that are in-
dividually selectable.
The optional 256 Kbit (32K x 8) secondary Flash
memory is divided into 4 equally-sized sectors.
Each sector is individually selectable.
The optional SRAM is intended for use as a
scratch-pad memory or as an extension to the
MCU SRAM. If an external battery is connected to
Voltage Stand-by (VSTBY, PC2), data is retained in
the event of power failure.
Each sector of memory can be located in a differ-
ent address space as defined by the user. The ac-
cess times for all memory types includes the
address latching and DPLD decoding time.
Page Register
The 8-bit Page Register expands the address
range of the MCU by up to 256 times. The paged
address can be used as part of the address space
to access external memory and peripherals, or in-
ternal memory and I/O. The Page Register can
also be used to change the address mapping of
sectors of the Flash memories into different mem-
ory spaces for IAP.
PLDs
The device contains two PLDs, the Decode PLD
(DPLD) and the Complex PLD (CPLD), as shown
in Table 2, each optimized for a different function.
The functional partitioning of the PLDs reduces
power consumption, optimizes cost/performance,
and eases design entry.
Table 2. PLD I/O
The DPLD is used to decode addresses and to
generate Sector Select signals for the PSD8XXFX
internal memory and registers. The DPLD has
combinatorial outputs. The CPLD has 16 Output
Macrocells (OMC) and 3 combinatorial outputs.
The PSD8XXFX also has 24 Input Macrocells
(IMC) that can be configured as inputs to the
PLDs. The PLDs receive their inputs from the PLD
Input Bus and are differentiated by their output
destinations, number of product terms, and mac-
rocells.
The PLDs consume minimal power. The speed
and power consumption of the PLD is controlled
by the Turbo bit in PMMR0 and other bits in the
PMMR2. These registers are set by the MCU at
run-time. There is a slight penalty to PLD propaga-
tion time when invoking the power management
features.
I/O Ports
The PSD8XXFX has 27 individually configurable I/
O pins distributed over the four ports (Port A, B, C,
and D). Each I/O pin can be individually configured
for different functions. Ports can be configured as
standard MCU I/O ports, PLD I/O, or latched ad-
dress outputs for MCUs using multiplexed ad-
dress/data buses.
The JTAG pins can be enabled on Port C for In-
System Programming (ISP).
Ports A and B can also be configured as a data
port for a non-multiplexed bus.
MCU Bus Interface
PSD8XXFX interfaces easily with most 8-bit
MCUs that have either multiplexed or non-multi-
plexed address/data buses. The device is config-
ured to respond to the MCU’s control signals,
which are also used as inputs to the PLDs. For ex-
amples, please see the section entitled “MCU Bus
Name
Inputs
Outputs
Product
Terms
Decode PLD (DPLD)
73
17
42
Complex PLD (CPLD)
73
19
140
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相关代理商/技术参数 |
参数描述 |
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| PSD813F4A-90J | 功能描述:SPLD - 简单可编程逻辑器件 U 511-PSD813F2A-90J RoHS:否 制造商:Texas Instruments 逻辑系列:TICPAL22V10Z 大电池数量:10 最大工作频率:66 MHz 延迟时间:25 ns 工作电源电压:4.75 V to 5.25 V 电源电流:100 uA 最大工作温度:+ 75 C 最小工作温度:0 C 安装风格:Through Hole 封装 / 箱体:DIP-24 |
| PSD813F4A-90M | 功能描述:SPLD - 简单可编程逻辑器件 U 511-PSD813F2A-90M RoHS:否 制造商:Texas Instruments 逻辑系列:TICPAL22V10Z 大电池数量:10 最大工作频率:66 MHz 延迟时间:25 ns 工作电源电压:4.75 V to 5.25 V 电源电流:100 uA 最大工作温度:+ 75 C 最小工作温度:0 C 安装风格:Through Hole 封装 / 箱体:DIP-24 |
| PSD813F4VA-15J | 功能描述:SPLD - 简单可编程逻辑器件 U 511-PSD813F2VA-15J RoHS:否 制造商:Texas Instruments 逻辑系列:TICPAL22V10Z 大电池数量:10 最大工作频率:66 MHz 延迟时间:25 ns 工作电源电压:4.75 V to 5.25 V 电源电流:100 uA 最大工作温度:+ 75 C 最小工作温度:0 C 安装风格:Through Hole 封装 / 箱体:DIP-24 |
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