参数资料
型号: R1EX25064ATA00A#S0
厂商: Renesas Electronics America
文件页数: 11/24页
文件大小: 0K
描述: IC EEPROM 64K 5MHZ 8TSSOP
标准包装: 1
格式 - 存储器: EEPROMs - 串行
存储器类型: EEPROM
存储容量: 64K (8K x 8)
速度: 3MHz,5MHz
接口: SPI 串行
电源电压: 1.8 V ~ 5.5 V
工作温度: -40°C ~ 85°C
封装/外壳: 8-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 8-TSSOP
包装: 标准包装
其它名称: R1EX25064ATA00A#S0DKR
R1EX25032Axx00A/R1EX25064Axx00A
Functional Description
Status Register
The following figure shows the Status Register Format. The Status Register contains a number of status and control
bits that can be read or set (as appropriate) by specific instructions.
Status Register Format
b7
b0
SRWD
0
0
0
BP1
BP0
WEL
WIP
Status Register Write Disable
Block Protect Bits
Write Enable Latch Bits
Write In Progress Bits
WIP bit: The Write In Progress (WIP) bit indicates whether the memory is busy with a Write or Write Status Register
cycle.
WEL bit: The Write Enable Latch (WEL) bit indicates the status of the internal Write Enable Latch.
BP1, BP0 bits: The Block Protect (BP1, BP0) bits are non-volatile. They define the size of the area to be software
protected against Write instructions.
SRWD bit: The Status Register Write Disable (SRWD) bit is operated in conjunction with the write protect ( W ) signal.
The Status Register Write Disable (SRWD) bit and write protect ( W ) signal allow the device to be put in the Hardware
Protected mode. In this mode, the non-volatile bits of the Status Register (SRWD, BP1, BP0) become read-only bits.
Instructions
Each instruction starts with a single-byte code, as summarized in the following table. If an invalid instruction is sent
(one not contained in the following table), the device automatically deselects itself.
Instruction Set
WREN
WRDI
RDSR
WRSR
READ
WRITE
Instruction
Description
Write Enable
Write Disable
Read Status Register
Write Status Register
Read from Memory Array
Write to Memory Array
Instruction Format
0000 0110
0000 0100
0000 0101
0000 0001
0000 0011
0000 0010
REJ03C0358-0002.Rev.0.02 Jan.14.2009
page 9 of 20
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