参数资料
型号: R1LV1616HBG-4SI
厂商: Renesas Technology Corp.
英文描述: Wide Temperature Range Version 16 M SRAM (1-Mword 】 16-bit)
中文描述: 宽温版本16米的SRAM(1 - Mword】16位)
文件页数: 12/15页
文件大小: 124K
代理商: R1LV1616HBG-4SI
R1LV1616HBG-I Series
Rev.1.00, Sep.21.2005, page 12 of 13
Low V
CC
Data Retention Characteristics
(Ta =
40 to +85
°
C)
Test conditions
*
2
Vin
0 V
(1) 0 V
CS2
0.2 V or
(2) CS2
V
CC
0.2 V,
CS1#
V
CC
0.2 V or
(3) LB# = UB#
V
CC
0.2 V,
CS2
V
CC
0.2 V,
CS1#
0.2 V
V
CC
= 3.0 V, Vin
0 V
(1) 0 V
CS2
0.2 V or
(2) CS2
V
CC
0.2 V,
CS1#
V
CC
0.2 V or
(3) LB# = UB#
V
CC
0.2 V,
CS2
V
CC
0.2 V,
CS1#
0.2 V
Average value
See retention waveforms
Parameter
Symbol
V
DR
Min
1.5
Typ
Max
3.6
Unit
V
V
CC
for data retention
Data retention current
I
CCDR
0.5
*
1
8
μ
A
Chip deselect to data
retention time
Operation recovery time
Notes: 1. Typical values are at V
CC
= 3.0 V, Ta = +25
°
C and not guaranteed.
2. CS2 controls address buffer, WE# buffer, CS1# buffer, OE# buffer, LB#, UB# buffer and Din buffer. If CS2
controls data retention mode, Vin levels (address, WE#, OE#, CS1#, LB#, UB#, I/O) can be in the high
impedance state. If CS1# controls data retention mode, CS2 must be CS2
V
CC
0.2 V or 0 V
CS2
0.2
V. The other input levels (address, WE#, OE#, LB#, UB#, I/O) can be in the high impedance state.
t
CDR
0
ns
t
R
5
ms
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