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参数资料
| 型号： | R1LV1616HBG-5SI |
| 厂商： | Renesas Technology Corp. |
| 英文描述： | Wide Temperature Range Version 16 M SRAM (1-Mword 】 16-bit) |
| 中文描述： | 宽温版本16米的SRAM（1 - Mword】16位） |
| 文件页数： | 7/15页 |
| 文件大小： | 124K |
| 代理商： | R1LV1616HBG-5SI |
R1LV1616HBG-I Series
Rev.1.00, Sep.21.2005, page 7 of 13
Read Cycle
R1LV1616HBG-I
-4SI
Max
45
45
45
30
45
20
20
15
15
-5SI
Parameter
Symbol
t
RC
t
AA
t
ACS1
t
ACS2
t
OE
t
OH
t
BA
t
CLZ1
t
CLZ2
t
BLZ
t
OLZ
t
CHZ1
t
CHZ2
t
BHZ
t
OHZ
Min
45
10
10
10
5
5
0
0
0
0
Min
55
10
10
10
5
5
0
0
0
0
Max
55
55
55
35
55
20
20
20
20
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
2, 3
2, 3
2, 3
2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
Read cycle time
Address access time
Chip select access time
Output enable to output valid
Output hold from address change
LB#, UB# access time
Chip select to output in low-Z
LB#, UB# enable to low-Z
Output enable to output in low-Z
Chip deselect to output in high-Z
LB#, UB# disable to high-Z
Output disable to output in high-Z
Write Cycle
R1LV1616HBG-I
-4SI
Max
15
15
-5SI
Parameter
Symbol
t
WC
t
AW
t
CW
t
WP
t
BW
t
AS
t
WR
t
DW
t
DH
t
OW
t
OHZ
t
WHZ
Min
45
45
45
35
45
0
0
25
0
5
0
0
Min
55
50
50
40
50
0
0
25
0
5
0
0
Max
20
20
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
5
4
6
7
2
1, 2
1, 2
Write cycle time
Address valid to end of write
Chip selection to end of write
Write pulse width
LB#, UB# valid to end of write
Address setup time
Write recovery time
Data to write time overlap
Data hold from write time
Output active from end of write
Output disable to output in high-Z
Write to output in high-Z
Notes: 1. t
CHZ
, t
OHZ
, t
WHZ
and t
BHZ
are defined as the time at which the outputs achieve the open circuit conditions and
are not referred to output voltage levels.
2. This parameter is sampled and not 100% tested.
3. At any given temperature and voltage condition, t
HZ
max is less than t
LZ
min both for a given device and from
device to device.
4. A write occurs during the overlap of a low CS1#, a high CS2, a low WE# and a low LB# or a low UB#. A write
begins at the latest transition among CS1# going low, CS2 going high, WE# going low and LB# going low or
UB# going low. A write ends at the earliest transition among CS1# going high, CS2 going low, WE# going
high and LB# going high or UB# going high. t
WP
is measured from the beginning of write to the end of write.
5. t
CW
is measured from the later of CS1# going low or CS2 going high to the end of write.
6. t
AS
is measured from the address valid to the beginning of write.
7. t
WR
is measured from the earliest of CS1# or WE# going high or CS2 going low to the end of write cycle.
相关PDF资料 |
PDF描述 |
|---|---|
| R1LV1616HBG-I | Wide Temperature Range Version 16 M SRAM (1-Mword 】 16-bit) |
| R1LV1616RBG-5SI | 16Mb Advanced LPSRAM (1M wordx16bit / 2M wordx8bit) |
| R1LV1616RBG-5SR | 16Mb Advanced LPSRAM (1M wordx16bit / 2M wordx8bit) |
| R1LV1616RSA-5SI | 16Mb Advanced LPSRAM (1M wordx16bit / 2M wordx8bit) |
| R1LV1616RSA-5SR | 16Mb Advanced LPSRAM (1M wordx16bit / 2M wordx8bit) |
相关代理商/技术参数 |
参数描述 |
|---|---|
| R1LV1616HBG-5SI#B0 | 功能描述:IC SRAM 16MBIT 50NS 48CSP RoHS:是 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:1,000 系列:- 格式 - 存储器:RAM 存储器类型:移动 SDRAM 存储容量:256M（8Mx32） 速度:133MHz 接口:并联 电源电压:1.7 V ~ 1.95 V 工作温度:-40°C ~ 85°C 封装/外壳:90-VFBGA 供应商设备封装:90-VFBGA（8x13） 包装:带卷 (TR) 其它名称:557-1327-2 |
| R1LV1616HBG-I | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:Wide Temperature Range Version 16 M SRAM (1-Mword 】 16-bit) |
| R1LV1616H-I | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:Wide Temperature Range Version 16 M SRAM (1-Mword × 16-bit / 2-Mword × 8-bit) |
| R1LV1616HSA-4LI | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:Wide Temperature Range Version 16 M SRAM (1-Mword 】 16-bit / 2-Mword 】 8-bit) |
| R1LV1616HSA-4SI | 制造商:Renesas Electronics 功能描述:2M~8 / 1M~16 45ns 3V 48TSOP Tray 制造商:Renesas Electronics Corporation 功能描述:SRAM 16MBIT 3V 45NS 48TSOP 制造商:Renesas 功能描述:SRAM Chip Async Single 3V 16M-Bit 2M/1M x 8/16-Bit 45ns 48-Pin TSOP-I |
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