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参数资料
| 型号： | R5F71474BD80FPV |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, FLASH, 80 MHz, RISC MICROCONTROLLER, PQFP100 |
| 封装： | 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100 |
| 文件页数： | 16/123页 |
| 文件大小： | 6757K |
| 代理商： | R5F71474BD80FPV |
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181
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P [DATASHEET]
8285E–AVR–02/2013
21.3.4
Two-wire Mode
The USI Two-wire mode is compliant to the Inter IC (TWI) bus protocol, but without slew rate limiting on outputs
and input noise filtering. Pin names used by this mode are SCL and SDA.
Figure 21-4. Two-wire Mode Operation, simplified diagram.
Figure 21-4 on page 181 shows two USI units operating in Two-wire mode, one as Master and one as Slave. It is
only the physical layer that is shown since the system operation is highly dependent of the communication scheme
used. The main differences between the Master and Slave operation at this level, is the serial clock generation
which is always done by the Master, and only the Slave uses the clock control unit. Clock generation must be
implemented in software, but the shift operation is done automatically by both devices. Note that only clocking on
negative edge for shifting data is of practical use in this mode. The slave can insert wait states at start or end of
transfer by forcing the SCL clock low. This means that the Master must always check if the SCL line was actually
released after it has generated a positive edge.
Since the clock also increments the counter, a counter overflow can be used to indicate that the transfer is com-
pleted. The clock is generated by the master by toggling the USCK pin via the PORT Register.
The data direction is not given by the physical layer. A protocol, like the one used by the TWI-bus, must be imple-
mented to control the data flow.
Figure 21-5. Two-wire Mode, typical timing diagram.
MASTER
SLAVE
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SDA
SCL
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Two-wire Clock
Control Unit
HOLD
SCL
PORTxn
SDA
SCL
VCC
P
S
ADDRESS
1 - 7
8
9
R/W
ACK
1 - 8
9
DATA
ACK
1 - 8
9
DATA
SDA
SCL
A
B
D
E
C
F
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