- 您现在的位置：买卖IC网 > PDF目录297235 > RD-19240FSA00T (DATA DEVICE CORP) SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, PQFP52 PDF资料下载
参数资料
| 型号： | RD-19240FSA00T |
| 厂商： | DATA DEVICE CORP |
| 元件分类： | 位置变换器 |
| 英文描述： | SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, PQFP52 |
| 封装： | PLASTIC, MQFP-52 |
| 文件页数： | 12/18页 |
| 文件大小： | 215K |
| 代理商： | RD-19240FSA00T |
3
Data Device Corporation
www.ddc-web.com
RD-19240
Pre 1-1-04/05-0
These specifications apply over the rated power supply, temperature,
and reference frequency ranges; 10% signal amplitude variation & 10% harmonic distortion.
PARAMETER
VALUE
UNIT
RESOLUTION
10, 12, or 14 (note 1)
Bits
REFERENCE
Type
Voltage: differential
single ended
overload
Frequency
Input Impedance
±Sig/Ref Phase Shift (permissible)
(+ RH, - RL)
Differential
10 max
±5 max
±25 continuous 100 transient
DC, 1k to 10k
10M min || 20 pf
45 max
Vpp
Vp
V
Hz
Ohm
deg
SIGNAL INPUT
Type
Voltage: operating
overload
Input Impedance
(+S, -S, SIN, +C, -C, COS)
Resolver, differential, groundbased
2 ±15%
±25 continuous
10M min || 10 pF
Vrms
V
Ohm
DIGITAL INPUT/OUTPUT (NOTE 6)
Logic Type
Inputs
Inhibit (INH)
Enable Bits 1 to 8 (EM)
Enable Bits 9 to 14 (EL)
Resolution and Mode Control (D1 & D0)
(see notes 1 and 8)
ZIP_EN
CMOS Compatible Inputs
SHIFT
UP/DN
A QUAD B
Outputs
Parallel Data (1-14)
Converter Busy (CB)
Built-in-Test (BIT)
Drive Capability
TTL/CMOS compatible
Logic 0 = 0.8 V max., Logic 1 = 2.0 V min.
Loading=10 A max P.U. current source to +5 V || 5 pF max., CMOS transient protected
Logic 0 inhibits; Data stable within 150 ns
Logic 0 enables; Data stable within 150 ns (Logic 0 = Transparent)
Logic 1 = High Impedance, Data High Z within 100 ns (note 7)
Logic 0 enables; Data stable within 150 ns (Logic 0 = Transparent)
Logic 1 = High Impedance, Data High Z within 100 ns (note 7)
Mode
D1
D0
Resolution
Resolver
0
10 bits
“
0
1
12 bits
“
1
0
14 bits
LVDT
-5 V
0
8 bits
“
0
-5 V
10 bits
“
1
-5 V
12 bits
Logic 0 enables ZIP, Logic 1 enables CB
Logic 0 = 1.5 V max., Logic 1 = 3.5 V min., negative voltage = -3.5 V min.
Logic 1 selects VEL1 components, Logic 0 selects VEL2 components
Logic 0, Gain of pre-charged components will be 4
Logic 1, Gain of pre-charged components will be 1/4
Logic 0 enables encoder emulation, falling edge latches encoder resolution
10, 12, or 14 parallel lines; natural binary angle positive logic
0.25 to 0.75 s positive pulse leading edge initiates counter update
Logic 0 for BIT condition.
±100 LSBs of error with a filter of 500 s total, Loss-of-Signal (LOS) less than 500 mV, or
Loss-of-Reference (LOR) less than 500 mV.
50 pF+
Logic 0; 1 TTL load, 1.6 mA at 0.4 V max.
Logic 1; 10 TTL loads, -0.4 mA at 2.8 V min
Logic 0; 100 mV max. driving CMOS
Logic 1; +5 V supply minus 100 mV min driving CMOS High Z; 10 uA || 5 pF max.
FREQUENCY RANGE
ACCURACY
Repeatability
Differential Linearity
Hz
Min
LSB
8 +1 LSB
± 1
± 2
TABLE 1. RD-19240 SPECIFICATIONS
1k to 10k
相关PDF资料 |
PDF描述 |
|---|---|
| RD10MWB | 10 V, 0.2 W, SILICON, UNIDIRECTIONAL VOLTAGE REGULATOR DIODE |
| RD15MWB | 15 V, 0.2 W, SILICON, UNIDIRECTIONAL VOLTAGE REGULATOR DIODE |
| RD24MWB | 24 V, 0.2 W, SILICON, UNIDIRECTIONAL VOLTAGE REGULATOR DIODE |
| RD27MWB | 27 V, 0.2 W, SILICON, UNIDIRECTIONAL VOLTAGE REGULATOR DIODE |
| RD9.1MWB | 9.1 V, 0.2 W, SILICON, UNIDIRECTIONAL VOLTAGE REGULATOR DIODE |
相关代理商/技术参数 |
参数描述 |
|---|---|
| RD1-9320 | 制造商:STMicroelectronics 功能描述:MPU DEMO-BOARD |
| RD1950MPXM2010GS | 制造商:Freescale Semiconductor 功能描述:WATER LEVEL REFERENCE DESIGN - Bulk |
| RD1986MMA2260D | 功能描述:加速传感器开发工具 TRIAX REF DSGN 3-AXIS FOR MMA2260D RoHS:否 制造商:Murata 工具用于评估:SCA3100-D04 加速:2 g 传感轴:Triple Axis 接口类型:SPI 工作电压:3.3 V |
| RD1986MMA6260Q | 功能描述:加速传感器开发工具 TRIAX REF DSGN 3-AXIS FOR NMA6260Q RoHS:否 制造商:Murata 工具用于评估:SCA3100-D04 加速:2 g 传感轴:Triple Axis 接口类型:SPI 工作电压:3.3 V |
| RD1A-12S | 制造商:World Products 功能描述: |
发布紧急采购，3分钟左右您将得到回复。