参数资料
型号: RDC-19222S-312T
厂商: DATA DEVICE CORP
元件分类: 位置变换器
英文描述: SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, PQCC44
封装: PLASTIC, J LEAD PACKAGE-44
文件页数: 15/20页
文件大小: 266K
代理商: RDC-19222S-312T
4
GENERAL SETUP CONDITIONS
DDC has external component selection software which consid-
ers all the criteria below and, in a simple fashion, asks the key
parameters (carrier frequency, resolution, bandwidth, and track-
ing rate) to derive the external component values.
The following recommendations should be considered when
installing the RDC-19220/2S R/D converter:
1) When setting the bandwidth (BW) and Tracking Rate (TR)
(selecting five external components), the system requirements
need to be considered. For the greatest noise immunity, select
the minimum BW and TR the system will allow.
2) Power supplies are ±5V dc. For lowest noise performance it is
recommended that a 0.1F or larger cap be connected from
each supply to ground near the converter package.
3) Resolver inputs and velocity output are referenced to AGND.
This pin should be connected to GND near the converter pack-
age. Digital currents flowing through ground will not disturb the
analog signals.
4) The BIT output, which is active low, is activated by an error of
approximately 100 LSBs. During normal operation, for step
inputs or on power up, a large error can exist.
5) Setup of bandwidth and velocity scaling for the optimized crit-
ically damped case should proceed as follows:
- Select the desired fBW (closed loop), based on overall sys-
tem dynamics.
- Select fcarrier
≥ 3.5 f
BW
For the converter max tracking rate value,
see the row indicated in TABLE 3.
{
}
- Compute Rv = 55 k x
Application max rate
3.2 x FS (Hz) x 108
- Compute CBW (pF) =
RV x (fBW)2
- Where FS = 70 kHz for RS = 30 k
100 kHz for RS = 20 k
125 kHz for RS = 15 k
0.9
- Compute RB =
CBW x fBW
CBW
- Compute
10
6) Selecting a fBW that is too low relative to the maximum appli-
cation tracking rate can create a spin-around condition in
which the converter never settles. The relationship to insure
against spin-around is as follows (TABLE 2.):
ERROR PROCESSOR
RESOLVER
INPUT
(
θ)
VELOCITY
OUT
DIGITAL
POSITION
OUT (
φ)
VCO
CT
S
A
+ 1
1
B
S
+ 1
10B
H = 1
+
-
e
A2
S
-12
db/oct
BA
2A
-6 db/oct
10B
ω (rad/sec)
2A
2 2 A
ω (rad/sec)
f
= BW (Hz) =
BW
2 A
π
CLOSED LOOP
(B = A/2)
GAIN = 0.4
GAIN = 4
(CRITICALLY DAMPED)
OPEN LOOP
FIGURE 3. TRANSFER FUNCTION
BLOCK DIAGRAM #2
FIGURE 4. BODE PLOTS
TABLE 2. TRACKING/BW RELATIONSHIP
RPS (MAX)/BW
RESOLUTION
1
10
0.50
12
0.25
14
0.125
16
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