参数资料
型号: RS5C316B-E2
厂商: RICOH COMPANY LTD
元件分类: 时钟/数据恢复及定时提取
英文描述: 0 TIMER(S), REAL TIME CLOCK, PDSO8
封装: 0.65 MM PITCH, SSOP-8
文件页数: 6/38页
文件大小: 288K
代理商: RS5C316B-E2
RS5C316A/B
10
2.1-6 (CTFG)
The CTFG bit is set to 1 when interrupt pulses are output from the INTR pin held at the low level. There are two
interrupt modes selectable: the pulse mode (when the CT3 bit is set to 0) and the level mode (when the CT3 bit is set
to 1). The CTFG bit can be set only when the CT3 is set to 1. Setting the CTFG bit to 1 switches the INTR pin to the
low level while setting the CTFG bit to 0 turns off the INTR pin.
Interrupt cycle register
INTR output
Description
CT3
CT2
CT1
CT0
0
* *
1
0
OFF
Interrupt halt
0
*
0
1
ON
Fixing the INTR pin at low level
0
*
1
0
0.977ms
Cycle: 0.977ms (1/1024Hz) Duty 50% *2
0
*
1
0.5s
Cycle: 0.5s (1/2Hz) *3
1
0
1s
Every second *4
1
0
1
10s
Every 10 seconds *4
(For display of second digits: 00, 10, 20, 30, 40 and 50)
1
0
1
0
1 minute
Every minute (00 second) *4
1
0
1
10 minutes
Every 10 minutes (00 second) *4
(For display of minute digits: 00, 10, 20, 30, 40 and 50)
1
0
1 hour
Every hour (00 minute and 00 second) *4
1
0
1
1 day
Every day (00 hour, 00 minute and 00 second a.m.) *4
1
0
1 week
Every week *4
(0 week, 0 hour, 00 minute and 00 second a.m.)
1
1 month
Every month *4
(1 day, 0 hour, 00 minute and 00 second a.m.)
*1) The symbol “*” in the above table indicates 0 or 1.
0.977ms
Interrupt
(Second count-up)
Interrupt
(Second count-up)
Setting CTFG bit to 0
CTFG
INTR
CTFG
INTR
0.5s
0.488ms
CTFG
INTR
*2)
*3)
*4)
相关PDF资料
PDF描述
RS5C317B-E1 0 TIMER(S), REAL TIME CLOCK, PDSO14
RS5C317B-E2 0 TIMER(S), REAL TIME CLOCK, PDSO14
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RS5C321B-E1 0 TIMER(S), REAL TIME CLOCK, PDSO8
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