RS5C316A/B
12
Day-of-the-week
12-hour system
Setting alarm time
Sun. Mon. Tue. Wed. Thu.
Fri.
Sat.
10-
1-
10-
1-
10-
1-
10-
1-
AW0 AW1 AW2 AW3 AW4 AW5 AW6 hour hour
min
hour hour
min
AM 00:00 every day
1
2
0
AM 01:30 every day
1
0
1
3
0
1
3
0
AM 11 : 59 every day
1
5
9
1
5
9
PM 00:00
0
1
0
3
2
0
1
2
0
on Monday through Friday
PM 01:30 on Sunday
1
0
2
1
3
0
1
3
0
PM 11:59 on Monday,
0
1
0
1
0
1
0
3
1
5
9
2
3
5
9
Wednesday, and Friday
2.3 Interrupt cycle Register (at 7h)
D3
D2
D1
D0
AW3
AW2
AW1
AW0
(For read/write) day-of-the-week 1
(at 0h)
ALC
AW6
AW5
AW4
(For read/write) day-of-the-week 2
(at 1h)
AM8
AM4
AM2
AM1
(For read/write) 1-minute time digit (at 2h)
*
AM40
AM20
AM10
(For read/write) 10-minute time digit (at 3h)
AH8
AH4
AH2
AH1
(For read/write) 1-hour time digit
(at 4h)
ALE
*
AP/A, AH20
AH10
(For read/write) 10-hour time digit
(at 5h)
2.4 Alarm registers for day-of-the-week, 1-minute, 10-minute, 1-hour, 10-hour (BANK1, at 0h-5h)
*1) The “*” mark in the above table indicates data which are set to 0 for read cycle and not set for write cycle.
*2) 10-hour time digit indicates AP/A and AH20 with 12-hour and 24-hour time system respectively.
*3) Make sure set an actual time-data to the alarm registers when the alarm function is activated as any imaginary alarm-data will never be match with
the actual time.
*4) The INTR pin can output matched alarm interruption when the ALC bit is set 0 and halt output when the ALC bit is set to 1.
*5) The alarm function is disabled when the ALE bit is set 0 and is enables when the ALE bit is set 1.
*6) Examples of setting alarm time
*7) Hour digits show “12” and “32” when the time is AM 00:00 and PM 00:00 respectively in the 12-hour system.
*8) No alarm interruption is output when all the bit from AW0 through AW6 is set to 0.
*9) Each of the AW0 through AW6 corresponds to the day-of-the-week counter such as (W4, W2, W1)=(0, 0, 0) through (1, 1, 0). Designation of day-of-
the-week and AW0 through AW6 in the above table is one example.
D3
D2
D1
D0
CT3
CT2
CT1
CT0
CT3
CT2
CT1
CT0
(For write operation)
(For read operation)
Bits for selecting the interrupt cycle and output mode at the INTR pin *1
*1) (CT3 to CT0)
The CT3 to CT0 bits are used to select the interrupt cycle and output mode at the INTR pin. There are two interrupt modes selectable: the pulse
mode (when the CT3 bit is set to 0) and the level mode (when the CT3 bit is set to 1). The interrupt cycle and output mode at the INTR pin are shown
in detail in the section on the CTFG bit in “2.1 Control Register 1 (at Eh)”.