参数资料
型号: S-80834CNNB-B8T-T2
元件分类: 电源管理
英文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO4
封装: SC-82-AB, 4 PIN
文件页数: 13/54页
文件大小: 724K
代理商: S-80834CNNB-B8T-T2
ULTRA-SMALL PACKAGE HIGH-PRECISION VOLTAGE DETECTOR
S-808xxC Series
Rev.3.2_00
20
Seiko Instruments Inc.
Operation
1. Basic Operation: CMOS Output (Active Low)
1-1.
When the power supply voltage (VDD) is higher than the release voltage (
+VDET), the Nch transistor is
OFF and the Pch transistor is ON to provide VDD (high) at the output. Since the Nch transistor N1 in
Figure 15
is OFF, the comparator input voltage is
C
B
A
DD
C
B
R
V
)
R
(
+
+
.
1-2.
When the VDD goes below
+VDET, the output provides the VDD level, as long as the VDD remains above
the detection voltage
VDET. When the VDD falls below VDET (point A in Figure 16), the Nch transistor
becomes ON, the Pch transistor becomes OFF, and the VSS level appears at the output. At this time
the Nch transistor N1 in Figure 15 becomes ON, the comparator input voltage is changed to
B
A
DD
B
R
V
R
+
.
1-3.
When the VDD falls below the minimum operating voltage, the output becomes undefined, or goes to the
VDD when the output is pulled up to the VDD.
1-4.
The VSS level appears when the VDD rises above the minimum operating voltage. The VSS level still
appears even when the VDD surpasses
VDET, as long as it does not exceed the release voltage +VDET.
1-5.
When the VDD rises above
+VDET (point B in Figure 16), the Nch transistor becomes OFF and the Pch
transistor becomes ON to provide VDD level at the output.
VREF
Pch
Nch
N1
RC
RB
RA
+
OUT
VSS
VDD
*1
*1.
Parasiteic diode
Figure 15 Operation 1
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