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参数资料
| 型号： | S29GL032A11BFIR31 |
| 厂商： | Spansion Inc. |
| 英文描述： | 64 MEGABIT 32MEGABIT 3.0 BOLT ONLY PAGE MODE FLASH MEMORY |
| 中文描述： | 64兆位32MEGABIT 3.0螺栓只页面模式闪存 |
| 文件页数： | 15/88页 |
| 文件大小： | 1425K |
| 代理商： | S29GL032A11BFIR31 |
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S29GLxxxA MirrorBit Flash Family
S29GLxxxA_00_A2 January 28, 2005
Ad van c e
Inf o rmation
Word/Byte Configuration
The BYTE# pin controls whether the device data I/O pins operate in the byte or
word configuration. If the BYTE# pin is set at logic ‘1’, the device is in word con-
figuration, DQ0–DQ15 are active and controlled by CE# and OE#.
If the BYTE# pin is set at logic ‘0’, the device is in byte configuration, and only
data I/O pins DQ0–DQ7 are active and controlled by CE# and OE#. The data I/
O pins DQ8–DQ14 are tri-stated, and the DQ15 pin is used as an input for the
LSB (A-1) address function.
Requirements for Reading Array Data
To read array data from the outputs, the system must drive the CE# and OE#
pins to VIL. CE# is the power control and selects the device. OE# is the output
control and gates array data to the output pins. WE# should remain at VIH.
The internal state machine is set for reading array data upon device power-up,
or after a hardware reset. This ensures that no spurious alteration of the memory
content occurs during the power transition. No command is necessary in this
mode to obtain array data. Standard microprocessor read cycles that assert valid
addresses on the device address inputs produce valid data on the device data
outputs. The device remains enabled for read access until the command register
contents are altered.
See “Reading Array Data” for more information. Refer to the AC Read-Only Op-
erations table for timing specifications and the timing diagram. Refer to the DC
Characteristics table for the active current specification on reading array data.
Page Mode Read
The device is capable of fast page mode read and is compatible with the page
mode Mask ROM read operation. This mode provides faster read access speed for
random locations within a page. The page size of the device is 4 words/8 bytes.
The appropriate page is selected by the higher address bits A(max)–A2. Address
bits A1–A0 in word mode (A1–A-1 in byte mode) determine the specific word
within a page. This is an asynchronous operation; the microprocessor supplies
the specific word location.
The random or initial page access is equal to tACC or tCE and subsequent page
read accesses (as long as the locations specified by the microprocessor falls
within that page) is equivalent to tPACC. When CE# is deasserted and reasserted
for a subsequent access, the access time is tACC or tCE. Fast page mode accesses
are obtained by keeping the “read-page addresses” constant and changing the
“intra-read page” addresses.
Writing Commands/Command Sequences
To write a command or command sequence (which includes programming data
to the device and erasing sectors of memory), the system must drive WE# and
CE# to VIL, and OE# to VIH.
The device features an Unlock Bypass mode to facilitate faster programming.
Once the device enters the Unlock Bypass mode, only two write cycles are re-
quired to program a word, instead of four. The “Word Program Command
Sequence” section has details on programming data to the device using both
standard and Unlock Bypass command sequences.
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相关代理商/技术参数 |
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| S29GL032A11BFIR32 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:64 MEGABIT 32MEGABIT 3.0 BOLT ONLY PAGE MODE FLASH MEMORY |
| S29GL032A11BFIR33 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:64 MEGABIT 32MEGABIT 3.0 BOLT ONLY PAGE MODE FLASH MEMORY |
| S29GL032A11BFIR40 | 制造商:Spansion 功能描述: 制造商:Spansion 功能描述:Flash - NOR IC |
| S29GL032A11BFIR41 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:64 MEGABIT 32MEGABIT 3.0 BOLT ONLY PAGE MODE FLASH MEMORY |
| S29GL032A11BFIR42 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:64 MEGABIT 32MEGABIT 3.0 BOLT ONLY PAGE MODE FLASH MEMORY |
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