参数资料
型号: S29GL032M10BAIR60
厂商: SPANSION LLC
元件分类: PROM
英文描述: MirrorBit Flash Family
中文描述: 2M X 16 FLASH 3V PROM, 100 ns, PBGA48
封装: 8 X 6 MM, BGA-48
文件页数: 65/110页
文件大小: 4891K
代理商: S29GL032M10BAIR60
56
S29GL-M MirrorBitTM Flash Family
S29GL-M_00_B5 December 13, 2005
Data
Sheet
Programming is allowed in any sequence of address locations and across sector boundaries. Pro-
gramming to the same word address multiple times without intervening erases (incremental bit
programming) requires a modified programming method. For such application requirements,
please contact your local Spansion representative. Word programming is supported for backward
compatibility with existing Flash driver software and for occasional writing of individual words. Use
of write buffer programming (see below) is strongly recommended for general programming use
when more than a few words are to be programmed. The effective word programming time using
write buffer programming is approximately four times shorter than the single word programming
time.
Any bit in a word cannot be programmed from “0” back to a “1.” Attempting to do so may
cause the device to set DQ5=1, or cause DQ7 and DQ6 status bits to indicate the operation was
successful. However, a succeeding read shows that the data is still “0.” Only erase operations can
convert a “0” to a “1.”
Unlock Bypass Command Sequence
The unlock bypass feature allows the system to program words to the device faster than using
the standard program command sequence. The unlock bypass command sequence is initiated by
first writing two unlock cycles. This is followed by a third write cycle containing the unlock bypass
command, 20h. The device then enters the unlock bypass mode. A two-cycle unlock bypass mode
command sequence is all that is required to program in this mode. The first cycle in this sequence
contains the unlock bypass program command, A0h; the second cycle contains the program ad-
dress and data. Additional data is programmed in the same manner. This mode dispenses with
the initial two unlock cycles required in the standard program command sequence, resulting in
faster total programming time. Table 35 and Table 36 show the requirements for the command
sequence.
During the unlock bypass mode, only the Unlock Bypass Program and Unlock Bypass Reset com-
mands are valid. To exit the unlock bypass mode, the system must issue the two-cycle unlock
bypass reset command sequence. The first cycle must contain the data 90h. The second cycle
must contain the data 00h. The device then returns to the read mode.
Write Buffer Programming
Write Buffer Programming allows the system write to a maximum of 16 words/32 bytes in one
programming operation. This results in faster effective programming time than the standard pro-
gramming algorithms. The Write Buffer Programming command sequence is initiated by first
writing two unlock cycles. This is followed by a third write cycle containing the Write Buffer Load
command written at the Sector Address in which programming occurs. The fourth cycle writes the
sector address and the number of word locations, minus one, to be programmed. For example, if
the system programs six unique address locations, then 05h should be written to the device. This
tells the device how many write buffer addresses are loaded with data and therefore when to ex-
pect the Program Buffer to Flash command. The number of locations to program cannot exceed
the size of the write buffer or the operation aborts.
The fifth cycle writes the first address location and data to be programmed. The write-buffer-page
is selected by address bits AMAX–A4. All subsequent address/data pairs must fall within the se-
lected-write-buffer-page. The system then writes the remaining address/data pairs into the write
buffer. Write buffer locations may be loaded in any order.
The write-buffer-page address must be the same for all address/data pairs loaded into the write
buffer. (This means Write Buffer Programming cannot be performed across multiple write-buffer
pages.) This also means that Write Buffer Programming cannot be performed across multiple sec-
tors. If the system attempts to load programming data outside of the selected write-buffer page,
the operation aborts.
相关PDF资料
PDF描述
S29GL032M10BAIR62 MirrorBit Flash Family
S29GL032M10BFIR52 T528 Series - I, M, Z Case Sizes - Face Down Termination Tantalum Surface Mount Capacitor; Capacitance [nom]: 470uF; Working Voltage (Vdc)[max]: 2.5V; Capacitance Tolerance: +/-20%; Dielectric: Tantalum, Solid; ESR: 8.0mΩ; Lead Style: Surface-Mount Chip; Lead Dimensions: 7343-17; Termination: 100% Tin (Sn); Body Dimensions: 7.3mm x 4.3mm x 1.7mm; Temperature Range: -55C to +105C; Container: Tape & Reel; Qty per Container: 1,000; Features: Face Down Termination
S29GL032M10BFIR53 T528 Series - I, M, Z Case Sizes - Face Down Termination Tantalum Surface Mount Capacitor; Capacitance [nom]: 470uF; Working Voltage (Vdc)[max]: 2.5V; Capacitance Tolerance: +/-20%; Dielectric: Tantalum, Solid; ESR: 9.0mΩ; Lead Style: Surface-Mount Chip; Lead Dimensions: 7343-17; Termination: 100% Tin (Sn); Body Dimensions: 7.3mm x 4.3mm x 1.7mm; Temperature Range: -55C to +105C; Container: Tape & Reel; Qty per Container: 1,000; Features: Face Down Termination
S29GL032M10BFIR60 T528 Series - I, M, Z Case Sizes - Face Down Termination Tantalum Surface Mount Capacitor; Capacitance [nom]: 470uF; Working Voltage (Vdc)[max]: 2.5V; Capacitance Tolerance: +/-20%; Dielectric: Tantalum, Solid; ESR: 12mΩ; Lead Style: Surface-Mount Chip; Lead Dimensions: 7343-17; Termination: 100% Tin (Sn); Body Dimensions: 7.3mm x 4.3mm x 1.7mm; Temperature Range: -55C to +105C; Container: Tape & Reel; Qty per Container: 1,000; Features: Face Down Termination
S29GL032M10BFIR62
相关代理商/技术参数
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S29GL032M10BBCR10 制造商:SPANSION 制造商全称:SPANSION 功能描述:MirrorBit Flash Family