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参数资料
| 型号： | S29GL032M10BFIR20 |
| 厂商： | SPANSION LLC |
| 元件分类： | PROM |
| 英文描述： | T528 Series - I, M, Z Case Sizes - Face Down Termination Tantalum Surface Mount Capacitor; Capacitance [nom]: 220uF; Working Voltage (Vdc)[max]: 4V; Capacitance Tolerance: +/-20%; Dielectric: Tantalum, Solid; ESR: 9.0mΩ; Lead Style: Surface-Mount Chip; Lead Dimensions: 7343-17; Termination: 100% Tin (Sn); Body Dimensions: 7.3mm x 4.3mm x 1.7mm; Temperature Range: -55C to +105C; Container: Tape & Reel; Qty per Container: 1,000; Features: Face Down Termination |
| 中文描述： | 2M X 16 FLASH 3V PROM, 100 ns, PBGA64 |
| 封装： | 13 X 11 MM, LEAD FREE, FORTIFIED BGA-64 |
| 文件页数： | 8/158页 |
| 文件大小： | 4695K |
| 代理商： | S29GL032M10BFIR20 |
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August 4, 2004 S29GLxxxM_00_B1_E
S29GLxxxM MirrorBitTM Flash Family
105
Da ta shee t
Any bit in a word cannot be programmed from “0” back to a “1.” Attempting to do so may cause the device
to set DQ5=1, or cause DQ7 and DQ6 status bits to indicate the operation was successful. However, a succeeding
read will show that the data is still “0.” Only erase operations can convert a “0” to a “1.”
Unlock Bypass Command Sequence
The unlock bypass feature allows the system to program words to the device faster than using the standard pro-
gram command sequence. The unlock bypass command sequence is initiated by first writing two unlock cycles.
This is followed by a third write cycle containing the unlock bypass command, 20h. The device then enters the
unlock bypass mode. A two-cycle unlock bypass mode command sequence is all that is required to program in
this mode. The first cycle in this sequence contains the unlock bypass program command, A0h; the second cycle
contains the program address and data. Additional data is programmed in the same manner. This mode dispenses
with the initial two unlock cycles required in the standard program command sequence, resulting in faster total
programming time. Tables 31 and 32 show the requirements for the command sequence.
During the unlock bypass mode, only the Unlock Bypass Program and Unlock Bypass Reset commands are valid.
To exit the unlock bypass mode, the system must issue the two-cycle unlock bypass reset command sequence.
The first cycle must contain the data 90h. The second cycle must contain the data 00h. The device then returns
to the read mode.
Write Buffer Programming
Write Buffer Programming allows the system write to a maximum of 16 words/32 bytes in one programming op-
eration. This results in faster effective programming time than the standard programming algorithms. The Write
Buffer Programming command sequence is initiated by first writing two unlock cycles. This is followed by a third
write cycle containing the Write Buffer Load command written at the Sector Address in which programming will
occur. The fourth cycle writes the sector address and the number of word locations, minus one, to be programmed.
For example, if the system will program 6 unique address locations, then 05h should be written to the device. This
tells the device how many write buffer addresses will be loaded with data and therefore when to expect the Pro-
gram Buffer to Flash command. The number of locations to program cannot exceed the size of the write buffer or
the operation will abort.
The fifth cycle writes the first address location and data to be programmed. The write-buffer-page is selected by
address bits AMAX–A4. All subsequent address/data pairs must fall within the selected-write-buffer-page. The sys-
tem then writes the remaining address/data pairs into the write buffer. Write buffer locations may be loaded in
any order.
The write-buffer-page address must be the same for all address/data pairs loaded into the write buffer. (This
means Write Buffer Programming cannot be performed across multiple write-buffer pages.) This also means that
Write Buffer Programming cannot be performed across multiple sectors. If the system attempts to load program-
ming data outside of the selected write-buffer page, the operation will abort.
Note that if a Write Buffer address location is loaded multiple times, the address/data pair counter will be decre-
mented for every data load operation. The host system must therefore account for loading a write-buffer location
more than once. The counter decrements for each data load operation, not for each unique write-buffer-address
location. Note also that if an address location is loaded more than once into the buffer, the final data loaded for
that address will be programmed.
Once the specified number of write buffer locations have been loaded, the system must then write the Program
Buffer to Flash command at the sector address. Any other address and data combination aborts the Write Buffer
Programming operation. The device then begins programming. Data polling should be used while monitoring the
last address location loaded into the write buffer. DQ7, DQ6, DQ5, and DQ1 should be monitored to determine
the device status during Write Buffer Programming.
The write-buffer programming operation can be suspended using the standard program suspend/resume com-
mands. Upon successful completion of the Write Buffer Programming operation, the device is ready to execute
the next command.
The Write Buffer Programming Sequence can be aborted in the following ways:
相关PDF资料 |
PDF描述 |
|---|---|
| S29GL032M10BFIR22 | T528 Series - I, M, Z Case Sizes - Face Down Termination Tantalum Surface Mount Capacitor; Capacitance [nom]: 220uF; Working Voltage (Vdc)[max]: 4V; Capacitance Tolerance: +/-20%; Dielectric: Tantalum, Solid; ESR: 12mΩ; Lead Style: Surface-Mount Chip; Lead Dimensions: 7343-17; Termination: 100% Tin (Sn); Body Dimensions: 7.3mm x 4.3mm x 1.7mm; Temperature Range: -55C to +105C; Container: Tape & Reel; Qty per Container: 1,000; Features: Face Down Termination |
| S29GL032M10BFIR23 | T528 Series - I, M, Z Case Sizes - Face Down Termination Tantalum Surface Mount Capacitor; Capacitance [nom]: 220uF; Working Voltage (Vdc)[max]: 6.3V; Capacitance Tolerance: +/-20%; Dielectric: Tantalum, Solid; ESR: 9.0mΩ; Lead Style: Surface-Mount Chip; Lead Dimensions: 7343-17; Termination: 100% Tin (Sn); Body Dimensions: 7.3mm x 4.3mm x 1.7mm; Temperature Range: -55C to +105C; Container: Tape & Reel; Qty per Container: 1,000; Features: Face Down Termination |
| S29GL032M10BFIR12 | MirrorBit Flash Family |
| S29GL032M10BFIR13 | MirrorBit Flash Family |
| S29GL032M10BFIR30 | T528 Series - I, M, Z Case Sizes - Face Down Termination Tantalum Surface Mount Capacitor; Capacitance [nom]: 220uF; Working Voltage (Vdc)[max]: 6.3V; Capacitance Tolerance: +/-20%; Dielectric: Tantalum, Solid; ESR: 12mΩ; Lead Style: Surface-Mount Chip; Lead Dimensions: 7343-17; Termination: 100% Tin (Sn); Body Dimensions: 7.3mm x 4.3mm x 1.7mm; Temperature Range: -55C to +105C; Container: Tape & Reel; Qty per Container: 1,000; Features: Face Down Termination |
相关代理商/技术参数 |
参数描述 |
|---|---|
| S29GL032M10BFIR22 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:MirrorBit Flash Family |
| S29GL032M10BFIR23 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:MirrorBit Flash Family |
| S29GL032M10BFIR30 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:3.0 Volt-only Page Mode Flash Memory featuring 0.23 um MirrorBit process technology |
| S29GL032M10BFIR32 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:3.0 Volt-only Page Mode Flash Memory featuring 0.23 um MirrorBit process technology |
| S29GL032M10BFIR33 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:3.0 Volt-only Page Mode Flash Memory featuring 0.23 um MirrorBit process technology |
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