参数资料
型号: S3P9664-AM
元件分类: 微控制器/微处理器
英文描述: 8-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PDIP24
封装: 0.300 INCH, SDIP-24
文件页数: 146/148页
文件大小: 784K
代理商: S3P9664-AM
S3C9664/P9664 (Preliminary Spec)
BASIC TIMER and TIMER 0
10-13
MUX
DIV
R
8-Bit Up-Counter
(T0CNT)
8-Bit Compatator
Timer 0 Buffer
Register
Bits 5, 4
Bit 0
Bit 2
T0_INT
Bit 3
Clear
Data Bus
Bit 0
T0_OVF
8-Bit Up Counter
(BTCNT, Read-Only)
DIV
R
XIN
OVF
RESET
Data Bus
Clear
When BTCNT.4 is set after releasing from
RESET or STOP mode, CPU clock starts.
Match
Basic Timer Control Register
(Write '1010xxxxB' to disable.)
NOTE:
During a power-on reset operation, the CPU is idle during the required oscillation
stabilization interval (until bit 4 of the basic timer counter is set).
Bits 7, 6
Bits 3, 2
Bit 1
RESET or STOP
(Timer 0
Overflow)
Bit3
(Timer 0
Match)
T0 (PWM)
Basic Timer Control Register
Timer 0 Control Register
T0CON (Counter Clear)
Match (Interval Timer Mode)
Overflow
Data Bus
Timer 0 Data
Register (T0DATA)
1/4096
1/1
1/8
1/256
1/4096
1/1024
T0 (CAP)
Bits 5, 4
R
1/128
1/1
Timer 0 Interrupt Control Register
Bit 1
Figure 10-11. Basic Timer and Timer 0 Block Diagram
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