参数资料
型号: S5N8947
厂商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: MCU for ADSL/Cable Modem
中文描述: 单片机为ADSL / Cable Modem的
文件页数: 46/49页
文件大小: 407K
代理商: S5N8947
S5N8947 (ADSL/Cable Modem MCU)
ELECTRONICS
MagIC Team
Page : 46
SAMSUNG ELECTRONICS
MDC
MDIO
0ns MIN, 300ns MAX
7 Cycles
7 Cycles
Figure 23 MDIO Sourced by PHY
INPUT VALID
10ns MIN
10ns MIN
MDC
MDIO
Figure 24 MDIO Sourced by STA
Timing Parameters for UTOPIA, An ATM-PHY Interface Specification
The AC characteristics are based on the timing specification for the receiver side pof a signal. The setup and hold times are
defined with regard to a positive clock edge (see Figure 25). Tacking the actual used clock frequency into account (e.g. up to
the max. frequency), the corresponding (min. and max.) transmit side “clock to output” propagation delay specifications can
be derived. The timing references (tT5 to tT12) are according to Table 8 and 9.
Clock
Signal
tT5, tT7
tT6, tT8
Input hold from clock
Input setup to clock
Figure 25 Aetup and hold time definition (single- and multi-PHY)
Figure 26 shows the tri-state timing for the multi-PHY application (multiple PHY devices, multiple output signals are
multiplexed together).
Clock
Signal
tT12
Signal going high
impedance from clock
Signal going low
impedance to clock
tT9
tT11
Signal going low
impedance from clock
tT10
Signal going high
impedance to clock
Figure 26 Tri-state timing (multi-PHY, multiple devices only)
In the following Tables, A
P (column DIR, direction) defines a signal from the ATM layer (transmitter, driver) to the PHY
layer (receiver), A
P defines a signal from the PHY layer (transmitter, driver) to the ATM layer (receiver).
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S5N8947X 制造商:SAMSUNG 制造商全称:Samsung semiconductor 功能描述:MCU for ADSL/Cable Modem
S5N8950 制造商:SAMSUNG 制造商全称:Samsung semiconductor 功能描述:G.dmt ADSL Transceiver for CO and CPE
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S5N8951X 制造商:SAMSUNG 制造商全称:Samsung semiconductor 功能描述:G.dmt ADSL Analog Front End IC
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