参数资料
型号: S71GL064A08
厂商: Spansion Inc.
英文描述: STACKED MULTI CHIP PRODUCT FLASH MEMORY AND RAM
中文描述: 堆叠式多芯片产品,闪存和RAM
文件页数: 133/134页
文件大小: 2383K
代理商: S71GL064A08
96
S71GL064A based MCPs
S71GL064A_00_A2 February 8, 2005
Advance
Info rmation
Power Savings Modes
(For 16M Page Mode, 32M and 64M Only)
There are several power savings modes.
Partial Array Self Refresh
Temperature Compensated Refresh (64M)
Deep Sleep Mode
Reduced Memory Size (32M, 16M)
The operation of the power saving modes ins controlled by the settings of bits
contained in the Mode Register. This definition of the Mode Register is shown in
Figure 33 and the various bits are used to enable and disable the various low
power modes as well as enabling Page Mode operation. The Mode Register is set
by using the timings defined in Figure 34.
Partial Array Self Refresh (PAR)
In this mode of operation, the internal refresh operation can be restricted to a
16Mb, 32Mb, or 48Mb portion of the array. The array partition to be refreshed is
determined by the respective bit settings in the Mode Register. The register set-
Figure 32. Timing Waveform of Page Mode Write Cycle (ZZ# = VIH)
Page A ddr es s
(A4 - A 20)
LB#, UB#
WE#
tWP
tCW
tDW
High-Z
Dat a Out
tLBW, tUBW
CE#
Wor d A ddr es s
(A0 - A3 )
tWC
tPWC
tDH
tPDW tPDH
tPDW
tPDH
tAS
tPGMAX
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