![](http://datasheet.mmic.net.cn/170000/S71WS512ND0BAWEH_datasheet_9723329/S71WS512ND0BAWEH_168.png)
166
1.8V 128Mb CellularRAM Type 2
cellram_04_A0 May 16, 2005
Advan c e
Inf o rmation
29 Configuration Registers
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29.1
Access Using Control Register Enable (CRE)
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Figure 29.1
Configuration Register Write, Asynchronous Mode Followed by Read Array Operation
A[22:0]
(except
A[19:18])
OPCODE
ADDRESS
DATA VALID
A[19:18]
ADV#
CE#
OE#
WE#
LB#/UB#
DQ[15:0]
Initiate Control Register Access
Write Address Bus Value
to Control Register
CRE
t
VP
t
CPH
t
WP
t
CW
Don't Care
Select Control Register
t
VPH
t
AVH
t
AVS
t
AVH
t
AVS