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| 型号： | SAB-XC164CM-8F40F |
| 厂商： | INFINEON TECHNOLOGIES AG |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQFP64 |
| 封装： | PLASTIC, TQFP-64 |
| 文件页数： | 36/69页 |
| 文件大小： | 1591K |
| 代理商： | SAB-XC164CM-8F40F |
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XC164CM
Derivatives
Functional Description
Data Sheet
39
V1.2, 2006-03
3.12
TwinCAN Module
The integrated TwinCAN module handles the completely autonomous transmission and
reception of CAN frames in accordance with the CAN specification V2.0 part B (active),
i.e. the on-chip TwinCAN module can receive and transmit standard frames with 11-bit
identifiers as well as extended frames with 29-bit identifiers.
Two Full-CAN nodes share the TwinCAN module’s resources to optimize the CAN bus
traffic handling and to minimize the CPU load. The module provides up to 32 message
objects, which can be assigned to one of the CAN nodes and can be combined to FIFO-
structures. Each object provides separate masks for acceptance filtering.
The flexible combination of Full-CAN functionality and FIFO architecture reduces the
efforts to fulfill the real-time requirements of complex embedded control applications.
Improved CAN bus monitoring functionality as well as the number of message objects
permit precise and comfortable CAN bus traffic handling.
Gateway functionality allows automatic data exchange between two separate CAN bus
systems, which reduces CPU load and improves the real time behavior of the entire
system.
The bit timing for both CAN nodes is derived from the master clock and is programmable
up to a data rate of 1 Mbit/s. Each CAN node uses two pins of Port 9 to interface to an
external bus transceiver. The interface pins are assigned via software.
Figure 10
TwinCAN Module Block Diagram
TwinCAN Module Kernel
MCB05567
TxDCA
RxDCA
TxDCB
RxDCB
CAN
Node A
CAN
Node B
Message
Object
Buffer
Clock
Control
f
CAN
Interrupt
Control
Address
Decoder
TwinCAN Control
Port
Control
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