参数资料
型号: SAF-TC11IB-64D96EBC
厂商: INFINEON TECHNOLOGIES AG
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 96 MHz, RISC MICROCONTROLLER, PBGA388
封装: PLASTIC, BGA-388
文件页数: 28/110页
文件大小: 1303K
代理商: SAF-TC11IB-64D96EBC
TC11IB
Data Sheet
20
V2.4, 2004-06
BREQ
B22
O
PUC
EBU_LMB Bus Request Output
In External Master Mode:
High during normal operation.Tricore activates BREQ
earliest one clock cycle after activating HLDA, if it has
to perform an external bus access. If Tricore has
regained the bus, BREQ is set to high one clock cycle
after deactivation of HLDA.
In External Slave Mode:
This signal is high as long as Tricore operates from
internal memory. When it detects that an external
access is required, it sets BREQ to low and waits for
signal HLDA to become low. BREQ will go back to
high when the slave has backed off the bus after it
was requested to go into hold mode.
RMW
AB23
I/O
PUC
EBU_LMB Read-Modify-Write Signal Line
BAA
A22
O
PUC
EBU_LMB Burst Address Advance Output
For advancing address in a burst flash access
ADV
B19
O
PUC
EBU_LMB Burst Flash Address Valid Output
ACLK
M23
O
EBU_LMB Additional Clock Output
Additional clock running equal, 1/2, 1/3 or 1/4 fre-
quency of EBUCLK
CMDELA
Y
B21
I
PUC
EBU_LMB Command Delay Input
For inserting delays between address and command.
TEST
MODE
AE9
I
PDC
Test Mode Select Input
For normal operation of the TC11IB, this pin should be
connected to Vss.
TM
CTRL1
C15
I
PUB
Test Mode Control Input 1
For normal operation of the TC11IB, this pin should be
connected to VDDP.
TM
CTRL2
C12
I
PUB
Test Mode Control Input 2
For normal operation of the TC11IB, this pin should be
connected to VDDP.
Table 1
Pin Definitions and Functions(cont’d)
Symbol
Pin
In
Out
PU/
PD1)
Functions
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