参数资料
| 型号： | SC16C752IB48,128 |
| 厂商： | NXP Semiconductors |
| 文件页数： | 17/47页 |
| 文件大小： | 0K |
| 描述： | IC DUAL UART 64BYTE 48LQFP |
| 标准包装： | 1 |
| 通道数： | 2，DUART |
| FIFO's： | 64 字节 |
| 电源电压： | 2.5V，3.3V，5V |
| 带自动流量控制功能： | 是 |
| 带故障启动位检测功能： | 是 |
| 带调制解调器控制功能： | 是 |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-LQFP |
| 供应商设备封装： | 48-LQFP（7x7） |
| 包装： | 标准包装 |
| 其它名称： | 568-5955-6 |
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Philips Semiconductors
SC16C752
Dual UART with 64-byte FIFO
Product data
Rev. 04 — 20 June 2003
24 of 47
9397 750 11635
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Remark: The three error bits (parity, framing, break) may not be updated correctly in
the rst read of the LSR when the input clock (XTAL1) is running faster than 36 MHz.
However, the second read is always correct. It is strongly recommended that when
using this device with a clock faster than 36 MHz, that the LSR be read twice and only
the second read be used for decision making. All other bits in the LSR are correct on
all reads.
7.6 Modem control register (MCR)
The MCR controls the interface with the mode, data set, or peripheral device that is
emulating the modem. Table 14 shows modem control register bit settings.
[1]
MCR[7:5] can only be modied when EFR[4] is set, i.e., EFR[4] is a write enable.
Table 14:
Modem Control Register bits description
Bit
Symbol
Description
7
MCR[7] [1]
Clock select.
Logic 0 = Divide-by-1 clock input.
Logic 1 = Divide-by-4 clock input.
6
MCR[6] [1]
TCR and TLR enable.
Logic 0 = no action.
Logic 1 = Enable access to the TCR and TLR registers.
5
MCR[5] [1]
Xon Any.
Logic 0 = Disable Xon Any function.
Logic 1 = Enable Xon Any function.
4
MCR[4]
Enable loop-back.
Logic 0 = Normal operating mode.
Logic 1 = Enable local loop-back mode (internal). In this mode the
MCR[3:0] signals are looped back into MSR[7:4] and the TX output
is looped back to the RX input internally.
3
MCR[3]
IRQ enable OP.
Logic0=Forces INTA-INTB outputs to the 3-State mode and OP
output to HIGH state.
Logic1=Forces the INTA-INTB outputs to the active state and OP
output to LOW state. In loop-back mode, controls MSR[7].
2
MCR[2]
FIFO Ready enable.
Logic 0 = Disable the FIFO Rdy register.
Logic 1 = Enable the FIFO Rdy register.
In loop-back mode, controls MSR[6].
1
MCR[1]
RTS
Logic 0 = Force RTS output to inactive (HIGH).
Logic 1 = Force RTS output to active (LOW).
In loop-back mode, controls MSR[4]. If Auto-RTS is enabled, the
RTS output is controlled by hardware ow control.
0
MCR[0]
DTR
Logic 0 = Force DTR output to inactive (HIGH).
Logic 1 = Force DTR output to active (LOW).
In loop-back mode, controls MSR[5].
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相关代理商/技术参数 |
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| SC16C754 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Quad UART with 64-byte FIFO |
| SC16C754B | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 64-byte FIFOs |
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| SC16C754BIA68,512 | 功能描述:UART 接口集成电路 16CB 2.5V-5V 4CH RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
| SC16C754BIA68,518 | 功能描述:UART 接口集成电路 4CH. UART 64B FIFO RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
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