参数资料
| 型号： | SC186ULTRT |
| 厂商： | Semtech |
| 文件页数： | 15/18页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 4A 16MLPQ |
| 标准包装： | 1 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.8 V ~ 3.3 V |
| 输入电压： | 2.9 V ~ 5.5 V |
| PWM 型： | 电压模式 |
| 频率 - 开关： | 1.5MHz |
| 电流 - 输出： | 4A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-UFQFN 裸露焊盘 |
| 包装： | 标准包装 |
| 供应商设备封装： | 16-MLPQ-UT（3x3） |
| 其它名称： | SC186ULDKR |
SC186
Applications Information (continued)
f C
Under-VoltageLockout
Under-Voltage Lockout (UVLO) is enabled when the input
voltage drops below the UVLO threshold. This prevents
the device from entering an ambiguous state in which
regulation cannot be maintained. Hysteresis of approxi-
mately 300mV is included to prevent chattering near the
threshold. When the AVIN voltage rises back to the turn-
on threshold and CTL X is high, the soft-start mode is
resumed.
Power Good
The power good (PGOOD) is an open-drain output. When
the output voltage drops below 10% of nominal voltage,
the PGOOD pin is pulled low after a 20μs delay. During
start-up, PGOOD will be asserted 2ms (typ.) after the
output voltage reaches 90% of the final regulation voltage.
The faults of over voltage, fold-back current limit mode
and thermal shutdown will force PGOOD low after a 20 μ s
delay. When recovering from a fault, PGOOD will be
asserted 1.8ms (typ.) after Vout reaches 90% of the final
regulation voltage.
Soft-Start
The soft-start mode is activated after AVIN reaches it ’s
UVLO voltage threshold and CTL X is set high to enable the
part. A thermal shutdown event will also activate the soft
start sequence. The soft-start mode controls the slew-rate
of the output voltage during start-up thus limiting in-rush
current on the input supply. During start-up, the reference
voltage for the error amplifier is clamped by the voltage
multiplied by the on-resistance of the internal PMOS
switch and the DC-resistance of the inductor when PMOS
switch is on continuously.
Output L-C filter Selection
SC186 has fixed internal loop-gain compensation. It
is optimized for X5R or X7R ceramic output capacitors
and an output L-C filter corner frequency of less
than 34kHz. The output L-C corner frequency can be
determined by Equation 2.
1
2 L C OUT
In general, the inductor is chosen to set the inductor ripple
current to approximately 30% of the maximum output
current. It is recommended to use a typical inductor value
of 1μH to 2.2μH with output ceramic capacitors of 44μF or
higher capacitance. Lower inductance should be consid-
ered in applications where faster transient response is
required. More output capacitance will reduce the output
deviation for a particular load transient. When using low
inductance, the maximum peak inductor current at any
condition (normal operation and start up) can not exceed
5A which is the guaranteed minimum current limit. The
saturation current rating of the inductor needs to be at
least larger than the peak inductor current which is the
maximum output current plus half of inductor ripple
current.
on the SS pin. The output voltage slew rate during soft-
start is determined by the value of the external capacitor
connected to the SS pin and the internal 5μA charging
current. The device requires a minimum soft-start time
from enable to final regulation in the order of 200μs,
including the 50μs enable delay. As a result the soft start
capacitor, Css, should be higher than 1.5nF. During start
up, the chip operates in forced PWM mode.
100% Duty-Cycle Operation
SC186 is capable of operating at 100% duty-cycle. When
the difference between the input voltage and output
voltage is less than the minimum dropout voltage, the
PMOS switch is completely on, operating in 100% duty-
cycle. The minimum dropout voltage is the output current
15
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相关代理商/技术参数 |
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