参数资料
| 型号： | SC186ULTRT |
| 厂商： | Semtech |
| 文件页数： | 16/18页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 4A 16MLPQ |
| 标准包装： | 1 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.8 V ~ 3.3 V |
| 输入电压： | 2.9 V ~ 5.5 V |
| PWM 型： | 电压模式 |
| 频率 - 开关： | 1.5MHz |
| 电流 - 输出： | 4A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-UFQFN 裸露焊盘 |
| 包装： | 标准包装 |
| 供应商设备封装： | 16-MLPQ-UT（3x3） |
| 其它名称： | SC186ULDKR |
SC186
Applications Information (continued)
PCB Layout Considerations
The layout diagram in Figure 3 shows a recommended
top-layer PCB for the SC186 and supporting components.
Figure 4 shows the bottom layer for this PCB. Fundamental
layout rules must be followed since the layout is critical for
achieving the performance specified in the Electrical
Characteristics table. Poor layout can degrade the perfor-
mance of the DC-DC converter and can contribute to EMI
problems, ground bounce, and resistive voltage losses.
Poor regulation and instability can result.
The following guidelines are recommended when devel-
oping a PCB layout:
1. The input capacitor, C IN should be placed as close to
the PVIN and PGND pins as possible. This capacitor
provides a low impedance loop for the pulsed currents
present at the buck converter ’s input. Use short wide
traces to connect as closely to the IC as possible.
This will minimize EMI and input voltage ripple by
localizing the high frequency current pulses.
2. Keep the LX pin traces as short as possible to minimize
Figure 3 — Recommended PCB Layout (Top Layer)
pickup of high frequency switching edges to other
parts of the circuit. C OUT and L should be connected as
close as possible between the LX and PGND pins, with
a direct return to the PGND pin from C OUT .
3. Route the output voltage feedback/sense path away
from the inductor and LX node to minimize noise and
magnetic interference.
4. Use a ground plane referenced to the SC186 PGND
pin. Use several vias to connect to the component
side ground to further reduce noise and interference
on sensitive circuit nodes.
5. If possible, minimize the resistance from the VOUT
and PGND pins to the load. This will reduce the
voltage drop on the ground plane and improve the
load regulation. And it will also improve the overall
efficiency by reducing the copper losses on the output
and ground planes.
Figure 4 — Bottom Layer Detail (Top View)
16
相关PDF资料 |
PDF描述 |
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| SC189LULTRT | IC REG BUCK SYNC 1.8V 1.5A 6MLPD |
| SC190CIMLTRT | IC REG BUCK SYNC ADJ 0.3A 10MLP |
| SC192IMLTRT | IC REG BUCK ADJ 0.7A 10MLPD |
| SC194AMLTRT | IC REG BUCK ADJ 1A 10MLP |
| SC194BMLTRT | IC REG BUCK ADJ 1A 10MLP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| SC187 | 制造商:SEMTECH 制造商全称:Semtech Corporation 功能描述:4A, 2.2MHz Synchronous Step-Down Regulator with 15 Preset Output Voltages |
| SC187EVB | 制造商:SEMTECH 制造商全称:Semtech Corporation 功能描述:4A, 2.2MHz Synchronous Step-Down Regulator with 15 Preset Output Voltages |
| SC187ULTRT | 制造商:Semtech Corporation 功能描述: 制造商:Semtech Corporation 功能描述:5.5V 4A 2.2MHZ SYNC BUCK |
| SC1887A-03A00 | 制造商:Scintera 功能描述:RF PREDISTORTION - LINEARIZER |
| SC1887A-04B00 | 制造商:Scintera 功能描述:RF PREDISTORTION - LINEARIZER |
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