参数资料
| 型号： | SC286ULTRT |
| 厂商： | Semtech |
| 文件页数： | 3/20页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 4A 28MLPQ |
| 标准包装： | 1 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 2 |
| 输出电压： | 0.8 V ~ 3.3 V |
| 输入电压： | 2.9 V ~ 5.5 V |
| PWM 型： | 电压模式 |
| 频率 - 开关： | 1.6MHz |
| 电流 - 输出： | 4A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-UFQFN 裸露焊盘 |
| 包装： | 标准包装 |
| 供应商设备封装： | 28-MLPQ（4x4） |
| 其它名称： | SC286ULDKR |
SC286
Absolute Maximum Ratings
PVINA/B and AVINA/B Supply Voltages (V) . . . -0.3 to +6.0
LXA, LXB (V) (1) . . . . . . . . . . . . . . . -0.3 to PVIN +0.3V, 6V Max
VOUTA, VOUTB (V) . . . . . . . . . . . . . . . . . . . -0.3 to AVIN + 0.3
CTLx A , CTLx B pins (V) . . . . . . . . . . . . . . . . -0.3 to AVIN + 0.3
VOUTA, VOUTB Short Circuit Duration . . . . . . Continuous
ESD Protection Level (2) (kV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Recommended Operating Conditions
PVINA/B and AVINA/B Supply (V) . . . . . . . . . . 2.9 to +5.5
Maximum Output Current, Each Channel (A) . . . . . . . . .4.0
Input Capacitor, Each Channel (μF) . . . . . . . . . . . . . . . . . . 22
Output Capacitor, Each Channel (μF) . . . . . . 47 or 2 x 22
Output Inductor, Each Channel (μH) . . . . . . . . . . . . . . . 1.0
Thermal Information
Thermal Resistance, Junction to Ambient (3) (°C/W) . . 32.5
Thermal Resistance, Junction to Case (°C/W) . . . . . . . . . . 7
Maximum Junction Temperature (°C) . . . . . . . . . . . . . . +150
Storage Temperature Range (°C) . . . . . . . . . . . -65 to +150
Peak IR Reflow Temperature (10s to 30s) (°C) . . . . . . +260
Exceeding the absolute maximum ratings may result in permanent damage to the device and/or device malfunction. Operation outside of the
parameters specified in the Electrical Characteristics section is not recommended.
Notes:
(1) Due to parasitic board inductance, the transient LX pin voltage at the point of measurement may appear larger than that which exists on silicon. The device is
designed to tolerate the short duration transient voltages that will appear on the LX pin due to the deadtime diode conduction, for inductor currents up to the
current limit setting of the device.
(2)
(3)
Tested according to JEDEC standard JESD22-A114-B.
Calculated from package in still air, mounted to 3 x 4.5 (in), 4 layer FR4 PCB with thermal vias under the exposed pad per JESD51 standards.
Electrical Characteristics
Unless specified: PVIN = AVIN = 5.0V, VOUT = 1.50V, C IN = 22μF, C OUT = 2 x 22μF; L = 1.0μH; -40°C≤ T J ≤ +125 °C; Per Channel Unless otherwise noted; Typical values are
T A = +25 °C.
Parameter
Symbol
Conditions
Rising AVINA/B; PVINA/B=AVINA/B
Min
2.70
Typ
2.80
Max
2.90
Units
V
Under-Voltage Lockout
UVLO
Hysteresis
300
mV
Output Voltage Tolerance (1)
ΔV OUT
PVINA/B= AVINA/B= 2.9 to 5.5V; I OUT =0A
-1.25
+1.25
%
Current Limit
Supply Current
Shutdown Current
High Side Switch Resistance (2)
I LIMIT
I Q
I SHDN
R DSON_P
Peak LX current
I OUTA/B = 0A
CTL3-0A/B = AGNDA/B
I LXA./B = 100mA, T J = 25 °C
5.0
6.0
100
1
50
7.0
10
A
μA
μA
mΩ
Low Side Switch Resistance (2)
R DSON_N
I LXA/B = -100mA, T J = 25 °C
35
L X Leakage Current
(2)
I LK(LX)
PVINA/B = AVINA/B= 5.5V; LXA/B= 0V; CTL3-0A/B =
AGNDA/B
PVINA/B = AVINA/B = 5.5V; LXA/B = 5.0V; CTL3-0A/B =
AGNDA/B
-20
1
-1
10
μA
3
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