参数资料
型号: SC28L198A1BE,528
厂商: NXP Semiconductors
文件页数: 42/57页
文件大小: 0K
描述: IC UART OCTAL SOT407-1
标准包装: 1,000
特点: 故障启动位检测
通道数: 8
FIFO's: 16 字节
电源电压: 3.3V,5V
带自动流量控制功能:
带故障启动位检测功能:
带调制解调器控制功能:
带CMOS:
安装类型: 表面贴装
封装/外壳: 100-LQFP
供应商设备封装: 100-LQFP(14x14)
包装: 带卷 (TR)
其它名称: 935262731528
SC28L198A1BE-T
SC28L198A1BE-T-ND
Philips Semiconductors
Product data sheet
SC28L198
Octal UART for 3.3 V and 5 V supply voltage
2006 Aug 10
47
AC ELECTRICAL CHARACTERISTICS FOR COMMERCIAL AND INDUSTRIAL (3.3 V) (Continued)
SYMBOL
FIGURE
PARAMETER
LIMITS
UNIT
SYMBOL
FIGURE
PARAMETER
MIN
TYP
MAX
UNIT
Fsclk
Sclk frequency
0.1
20
MHz
T/RFsclk
Sclk rise/fall time (0.8 to 2.0Volts)
5
ns
X1 / X2 Communication Crystal Clock
Fx15
X1 clock frequency
1
3.6864
4
MHz
X1 L / H
X1 Low / High time
80
52
ns
T/RFx1
X1 Rise / Fall time
10
ns
Counter/Timer Baud Rate Clock (External Clock Input)
FC/T4
Clock frequency
0
8
MHz
TC/TLH
C/T high and low time
20
15
ns
TC/TO
Delay C/T clock external to output pin
48
110
ns
DACKN Timing
DAKDLY
DACK low from Sclk C4 rising edge
18
30
ns
DAKDLYA
DACK high from CEN high (ASYNC)
18
30
ns
DAKDLY
DACK high from C4 end rising edge (SYNC)
20
30
ns
I/O PORT External Clock
TGPIRTX
GPI to Rx/Tx clock out
50
80
ns
RxD setup to I/OP rising edge 1X mode
20
2
ns
I/OP falling edge to TxD out 1X mode
32
70
ns
GOUT Timing
GPOTDD
GPO valid after write to GPOR
100
ns
NOTES:
1. Timing is illustrated and referenced with respect to W–RN and CEN inputs. Internal read and write activities are controlled by the Sclk as it
generates the several “C” timing as shown in the timing diagrams.
2. The minimum time before the rising edge of the next C2 time to stop the next bus cycle. CEN must return high after midpoint of C4 time and
before the C2 time of the next cycle.
3. Delay is from CEN high in Async mode to IRQN inactive, from end of C4 to IRQN inactive in Sync mode.
4. The minimum frequency values are not tested, but are guaranteed by design.
5. 1MHz specification is for crystal operation.
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