参数资料
| 型号： | SC412AMLTRT |
| 厂商： | Semtech |
| 文件页数： | 12/22页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM 16-MLP |
| 标准包装： | 1 |
| PWM 型： | 控制器 |
| 输出数： | 1 |
| 频率 - 最大： | 325kHz |
| 占空比： | 90% |
| 电源电压： | 3 V ~ 25 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 16-MLP |
| 包装： | 标准包装 |
| 其它名称： | SC412AMLDKR |
NOT RECOMMENDED FOR NEW DESIGN
POWER MANAGEMENT
Applications Information (continued)
SC412A
The switching frequency is optimized for 325kHz. The
equation for on-time is:
T ON (nsec) = 2560 ? (V OUT /V BAT ) + 35
During the DH on-time, voltage across the inductor is (VBAT
- VOUT). To determine the inductance, the ripple current
must be de ? ned. Smaller ripple current will give smaller
output ripple and but will lead to larger inductors. The ripple
current will also set the boundary for PSAVE operation: the
switching will typically enter PSAVE operation when the
load current decreases to 1/2 of the ripple current; (i.e.
if ripple current is 4A then PSAVE operation will typically
start for loads less than 2A. If ripple current is set at 40%
of maximum load current, then PSAVE will commence for
loads less than 20% of maximum current).
The equation for determining inductance is:
L = (V BAT - VOUT) ? T ON / I RIPPLE
Use the maximum value for VBAT, and for TON use the value
associated with maximum VBAT.
T ON = 182 nsec at 20V BAT , 1.1V OUT
L = (20 - 1.15) ? 182 nsec / 5A = 0.69 μ H
We will select a slightly larger value of 0.7 μ H, which will
decrease the maximum I RIPPLE to 4.91A.
Note: the inductor must be rated for the maximum DC load cur-
rent plus 1/2 of the ripple current.
The ripple current under minimum VBAT conditions is also
checked.
TON VBATMIN = 2560 ? (1.15/10) + 35 = 329 nsec
I RIPPLE = (V BAT - V OUT ) ? T ON / L
I RIPPLE_VBATMIN = (10 - 1.15) ? 329 nsec / 0.7 μ H = 4.16A
Capacitor Selection
The output capacitors are chosen based on required ESR
and capacitance. The ESR requirement is driven by the
output ripple requirement and the DC tolerance. The
output voltage has a DC value that is equal to the valley
of the output ripple, plus 1/2 of the peak-to-peak ripple.
Change in the ripple voltage will lead to a change in DC
voltage at the output.
The design goal is +/-4% output regulation. The internal
0.75V reference tolerance is 1%, assuming 1% tolerance
for the FB resistor divider, this allows 2% tolerance due to
VOUT ripple. Since this 2% error comes from 1/2 of the
ripple voltage, the allowable ripple is 4%, or 46mV for a
1.15V output.
The maximum ripple current of 4.05A creates a ripple
voltage across the ESR. The maximum ESR value allowed
would be 44mV:
ESR MAX = V RIPPLE /I RIPPLEMAX = 46mV / 4.91A
ESR MAX = 9.4 m Ω
The output capacitance is typically chosen based on tran-
sient requirements. A worst-case load release, from maxi-
mum load to no load at the exact moment when inductor
current is at the peak, de ? nes the required capacitance.
If the load release is instantaneous (load changes from
maximum to zero in a very small time), the output capaci-
tor must absorb all the inductor’s stored energy. This will
cause a peak voltage on the capacitor according to the
equation:
COUT MIN = L ? (I OUT + 1/2 ? I RIPPLEMAX ) 2 / (V PEAK2 - VOUT 2 )
Assuming a peak voltage VPEAK of 1.230 (80mV rise upon
load release), and a 10 amp load release, the required
capacitance is:
COUT MIN = 0.7 μ H?(10 + 1/2 ? 4.91) 2 / (1.23 2 - 1.15 2 )
COUT MIN = 570 μ F
? 2006 Semtech Corp.
12
www.semtech.com
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